60 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_save_regs()  local
62 	mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);  in mpc8xxx_gpio_save_regs()
74 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8572_gpio_get()  local
80 	out_shadow = mpc8xxx_gc->data & out_mask;  in mpc8572_gpio_get()
95 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_set()  local
98 	raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set()
101 		mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio);  in mpc8xxx_gpio_set()
103 		mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio);  in mpc8xxx_gpio_set()
105 	out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);  in mpc8xxx_gpio_set()
107 	raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set()
114 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_set_multiple()  local
118 	raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set_multiple()
125 				mpc8xxx_gc->data |= mpc8xxx_gpio2mask(i);  in mpc8xxx_gpio_set_multiple()
127 				mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(i);  in mpc8xxx_gpio_set_multiple()
131 	out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);  in mpc8xxx_gpio_set_multiple()
133 	raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set_multiple()
139 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_dir_in()  local
142 	raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_in()
146 	raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_in()
154 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_dir_out()  local
159 	raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_out()
163 	raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_out()
189 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_to_irq()  local
191 	if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS)  in mpc8xxx_gpio_to_irq()
192 		return irq_create_mapping(mpc8xxx_gc->irq, offset);  in mpc8xxx_gpio_to_irq()
199 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);  in mpc8xxx_gpio_irq_cascade()  local
201 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_gpio_irq_cascade()
206 		generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,  in mpc8xxx_gpio_irq_cascade()
214 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_unmask()  local
215 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_unmask()
218 	raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_unmask()
222 	raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_unmask()
227 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_mask()  local
228 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_mask()
231 	raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_mask()
235 	raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_mask()
240 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_ack()  local
241 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_ack()
248 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_set_type()  local
249 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_set_type()
254 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
257 		raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
261 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
264 		raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
276 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc512x_irq_set_type()  local
277 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc512x_irq_set_type()
294 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
296 		raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
301 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
303 		raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
307 		raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
309 		raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
382 	struct mpc8xxx_gpio_chip *mpc8xxx_gc;  in mpc8xxx_probe()  local
390 	mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL);  in mpc8xxx_probe()
391 	if (!mpc8xxx_gc)  in mpc8xxx_probe()
394 	platform_set_drvdata(pdev, mpc8xxx_gc);  in mpc8xxx_probe()
396 	raw_spin_lock_init(&mpc8xxx_gc->lock);  in mpc8xxx_probe()
398 	mm_gc = &mpc8xxx_gc->mm_gc;  in mpc8xxx_probe()
424 	mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0);  in mpc8xxx_probe()
425 	if (mpc8xxx_gc->irqn == NO_IRQ)  in mpc8xxx_probe()
428 	mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,  in mpc8xxx_probe()
429 					&mpc8xxx_gpio_irq_ops, mpc8xxx_gc);  in mpc8xxx_probe()
430 	if (!mpc8xxx_gc->irq)  in mpc8xxx_probe()
435 		mpc8xxx_gc->of_dev_id_data = id->data;  in mpc8xxx_probe()
441 	irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,  in mpc8xxx_probe()
442 					 mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);  in mpc8xxx_probe()
449 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = platform_get_drvdata(pdev);  in mpc8xxx_remove()  local
451 	if (mpc8xxx_gc->irq) {  in mpc8xxx_remove()
452 		irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, NULL, NULL);  in mpc8xxx_remove()
453 		irq_domain_remove(mpc8xxx_gc->irq);  in mpc8xxx_remove()
456 	of_mm_gpiochip_remove(&mpc8xxx_gc->mm_gc);  in mpc8xxx_remove()