182 static bool dce_v11_0_is_in_vblank(struct amdgpu_device *adev, int crtc)  in dce_v11_0_is_in_vblank()  argument
184 	if (RREG32(mmCRTC_STATUS + crtc_offsets[crtc]) &  in dce_v11_0_is_in_vblank()
191 static bool dce_v11_0_is_counter_moving(struct amdgpu_device *adev, int crtc)  in dce_v11_0_is_counter_moving()  argument
195 	pos1 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);  in dce_v11_0_is_counter_moving()
196 	pos2 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);  in dce_v11_0_is_counter_moving()
212 static void dce_v11_0_vblank_wait(struct amdgpu_device *adev, int crtc)  in dce_v11_0_vblank_wait()  argument
216 	if (crtc >= adev->mode_info.num_crtc)  in dce_v11_0_vblank_wait()
219 	if (!(RREG32(mmCRTC_CONTROL + crtc_offsets[crtc]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK))  in dce_v11_0_vblank_wait()
225 	while (dce_v11_0_is_in_vblank(adev, crtc)) {  in dce_v11_0_vblank_wait()
227 			if (!dce_v11_0_is_counter_moving(adev, crtc))  in dce_v11_0_vblank_wait()
232 	while (!dce_v11_0_is_in_vblank(adev, crtc)) {  in dce_v11_0_vblank_wait()
234 			if (!dce_v11_0_is_counter_moving(adev, crtc))  in dce_v11_0_vblank_wait()
240 static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)  in dce_v11_0_vblank_get_counter()  argument
242 	if (crtc >= adev->mode_info.num_crtc)  in dce_v11_0_vblank_get_counter()
245 		return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);  in dce_v11_0_vblank_get_counter()
291 static int dce_v11_0_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,  in dce_v11_0_crtc_get_scanoutpos()  argument
294 	if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))  in dce_v11_0_crtc_get_scanoutpos()
297 	*vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);  in dce_v11_0_crtc_get_scanoutpos()
298 	*position = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);  in dce_v11_0_crtc_get_scanoutpos()
702 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);  in dce_v11_0_program_fmt()
1732 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);  in dce_v11_0_audio_set_dto()
1778 	if (encoder->crtc) {  in dce_v11_0_afmt_setmode()
1779 		struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc);  in dce_v11_0_afmt_setmode()
2001 static void dce_v11_0_vga_enable(struct drm_crtc *crtc, bool enable)  in dce_v11_0_vga_enable()  argument
2003 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_vga_enable()
2004 	struct drm_device *dev = crtc->dev;  in dce_v11_0_vga_enable()
2015 static void dce_v11_0_grph_enable(struct drm_crtc *crtc, bool enable)  in dce_v11_0_grph_enable()  argument
2017 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_grph_enable()
2018 	struct drm_device *dev = crtc->dev;  in dce_v11_0_grph_enable()
2027 static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,  in dce_v11_0_crtc_do_set_base()  argument
2031 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_do_set_base()
2032 	struct drm_device *dev = crtc->dev;  in dce_v11_0_crtc_do_set_base()
2047 	if (!atomic && !crtc->primary->fb) {  in dce_v11_0_crtc_do_set_base()
2057 		amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);  in dce_v11_0_crtc_do_set_base()
2058 		target_fb = crtc->primary->fb;  in dce_v11_0_crtc_do_set_base()
2190 	dce_v11_0_vga_enable(crtc, false);  in dce_v11_0_crtc_do_set_base()
2228 	dce_v11_0_grph_enable(crtc, true);  in dce_v11_0_crtc_do_set_base()
2237 	viewport_w = crtc->mode.hdisplay;  in dce_v11_0_crtc_do_set_base()
2238 	viewport_h = (crtc->mode.vdisplay + 1) & ~1;  in dce_v11_0_crtc_do_set_base()
2252 	if (!atomic && fb && fb != crtc->primary->fb) {  in dce_v11_0_crtc_do_set_base()
2268 static void dce_v11_0_set_interleave(struct drm_crtc *crtc,  in dce_v11_0_set_interleave()  argument
2271 	struct drm_device *dev = crtc->dev;  in dce_v11_0_set_interleave()
2273 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_set_interleave()
2284 static void dce_v11_0_crtc_load_lut(struct drm_crtc *crtc)  in dce_v11_0_crtc_load_lut()  argument
2286 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_load_lut()
2287 	struct drm_device *dev = crtc->dev;  in dce_v11_0_crtc_load_lut()
2410 static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)  in dce_v11_0_pick_pll()  argument
2412 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_pick_pll()
2413 	struct drm_device *dev = crtc->dev;  in dce_v11_0_pick_pll()
2424 			pll = amdgpu_pll_get_shared_dp_ppll(crtc);  in dce_v11_0_pick_pll()
2430 		pll = amdgpu_pll_get_shared_nondp_ppll(crtc);  in dce_v11_0_pick_pll()
2436 	pll_in_use = amdgpu_pll_get_use_mask(crtc);  in dce_v11_0_pick_pll()
2457 static void dce_v11_0_lock_cursor(struct drm_crtc *crtc, bool lock)  in dce_v11_0_lock_cursor()  argument
2459 	struct amdgpu_device *adev = crtc->dev->dev_private;  in dce_v11_0_lock_cursor()
2460 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_lock_cursor()
2471 static void dce_v11_0_hide_cursor(struct drm_crtc *crtc)  in dce_v11_0_hide_cursor()  argument
2473 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_hide_cursor()
2474 	struct amdgpu_device *adev = crtc->dev->dev_private;  in dce_v11_0_hide_cursor()
2482 static void dce_v11_0_show_cursor(struct drm_crtc *crtc)  in dce_v11_0_show_cursor()  argument
2484 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_show_cursor()
2485 	struct amdgpu_device *adev = crtc->dev->dev_private;  in dce_v11_0_show_cursor()
2499 static int dce_v11_0_cursor_move_locked(struct drm_crtc *crtc,  in dce_v11_0_cursor_move_locked()  argument
2502 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_cursor_move_locked()
2503 	struct amdgpu_device *adev = crtc->dev->dev_private;  in dce_v11_0_cursor_move_locked()
2507 	x += crtc->x;  in dce_v11_0_cursor_move_locked()
2508 	y += crtc->y;  in dce_v11_0_cursor_move_locked()
2509 	DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y);  in dce_v11_0_cursor_move_locked()
2531 static int dce_v11_0_crtc_cursor_move(struct drm_crtc *crtc,  in dce_v11_0_crtc_cursor_move()  argument
2536 	dce_v11_0_lock_cursor(crtc, true);  in dce_v11_0_crtc_cursor_move()
2537 	ret = dce_v11_0_cursor_move_locked(crtc, x, y);  in dce_v11_0_crtc_cursor_move()
2538 	dce_v11_0_lock_cursor(crtc, false);  in dce_v11_0_crtc_cursor_move()
2543 static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc,  in dce_v11_0_crtc_cursor_set2()  argument
2551 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_cursor_set2()
2558 		dce_v11_0_hide_cursor(crtc);  in dce_v11_0_crtc_cursor_set2()
2569 	obj = drm_gem_object_lookup(crtc->dev, file_priv, handle);  in dce_v11_0_crtc_cursor_set2()
2593 	dce_v11_0_lock_cursor(crtc, true);  in dce_v11_0_crtc_cursor_set2()
2602 		dce_v11_0_cursor_move_locked(crtc, x, y);  in dce_v11_0_crtc_cursor_set2()
2608 	dce_v11_0_show_cursor(crtc);  in dce_v11_0_crtc_cursor_set2()
2609 	dce_v11_0_lock_cursor(crtc, false);  in dce_v11_0_crtc_cursor_set2()
2626 static void dce_v11_0_cursor_reset(struct drm_crtc *crtc)  in dce_v11_0_cursor_reset()  argument
2628 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_cursor_reset()
2631 		dce_v11_0_lock_cursor(crtc, true);  in dce_v11_0_cursor_reset()
2633 		dce_v11_0_cursor_move_locked(crtc, amdgpu_crtc->cursor_x,  in dce_v11_0_cursor_reset()
2636 		dce_v11_0_show_cursor(crtc);  in dce_v11_0_cursor_reset()
2638 		dce_v11_0_lock_cursor(crtc, false);  in dce_v11_0_cursor_reset()
2642 static void dce_v11_0_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,  in dce_v11_0_crtc_gamma_set()  argument
2645 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_gamma_set()
2654 	dce_v11_0_crtc_load_lut(crtc);  in dce_v11_0_crtc_gamma_set()
2657 static void dce_v11_0_crtc_destroy(struct drm_crtc *crtc)  in dce_v11_0_crtc_destroy()  argument
2659 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_destroy()
2661 	drm_crtc_cleanup(crtc);  in dce_v11_0_crtc_destroy()
2675 static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)  in dce_v11_0_crtc_dpms()  argument
2677 	struct drm_device *dev = crtc->dev;  in dce_v11_0_crtc_dpms()
2679 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_dpms()
2685 		amdgpu_atombios_crtc_enable(crtc, ATOM_ENABLE);  in dce_v11_0_crtc_dpms()
2686 		dce_v11_0_vga_enable(crtc, true);  in dce_v11_0_crtc_dpms()
2687 		amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE);  in dce_v11_0_crtc_dpms()
2688 		dce_v11_0_vga_enable(crtc, false);  in dce_v11_0_crtc_dpms()
2694 		dce_v11_0_crtc_load_lut(crtc);  in dce_v11_0_crtc_dpms()
2701 			dce_v11_0_vga_enable(crtc, true);  in dce_v11_0_crtc_dpms()
2702 			amdgpu_atombios_crtc_blank(crtc, ATOM_ENABLE);  in dce_v11_0_crtc_dpms()
2703 			dce_v11_0_vga_enable(crtc, false);  in dce_v11_0_crtc_dpms()
2705 		amdgpu_atombios_crtc_enable(crtc, ATOM_DISABLE);  in dce_v11_0_crtc_dpms()
2713 static void dce_v11_0_crtc_prepare(struct drm_crtc *crtc)  in dce_v11_0_crtc_prepare()  argument
2716 	amdgpu_atombios_crtc_powergate(crtc, ATOM_DISABLE);  in dce_v11_0_crtc_prepare()
2717 	amdgpu_atombios_crtc_lock(crtc, ATOM_ENABLE);  in dce_v11_0_crtc_prepare()
2718 	dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);  in dce_v11_0_crtc_prepare()
2721 static void dce_v11_0_crtc_commit(struct drm_crtc *crtc)  in dce_v11_0_crtc_commit()  argument
2723 	dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_ON);  in dce_v11_0_crtc_commit()
2724 	amdgpu_atombios_crtc_lock(crtc, ATOM_DISABLE);  in dce_v11_0_crtc_commit()
2727 static void dce_v11_0_crtc_disable(struct drm_crtc *crtc)  in dce_v11_0_crtc_disable()  argument
2729 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_disable()
2730 	struct drm_device *dev = crtc->dev;  in dce_v11_0_crtc_disable()
2735 	dce_v11_0_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);  in dce_v11_0_crtc_disable()
2736 	if (crtc->primary->fb) {  in dce_v11_0_crtc_disable()
2741 		amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb);  in dce_v11_0_crtc_disable()
2752 	dce_v11_0_grph_enable(crtc, false);  in dce_v11_0_crtc_disable()
2754 	amdgpu_atombios_crtc_powergate(crtc, ATOM_ENABLE);  in dce_v11_0_crtc_disable()
2773 		amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id,  in dce_v11_0_crtc_disable()
2786 static int dce_v11_0_crtc_mode_set(struct drm_crtc *crtc,  in dce_v11_0_crtc_mode_set()  argument
2791 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_mode_set()
2796 	amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);  in dce_v11_0_crtc_mode_set()
2797 	amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);  in dce_v11_0_crtc_mode_set()
2798 	dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0);  in dce_v11_0_crtc_mode_set()
2799 	amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);  in dce_v11_0_crtc_mode_set()
2800 	amdgpu_atombios_crtc_scaler_setup(crtc);  in dce_v11_0_crtc_mode_set()
2801 	dce_v11_0_cursor_reset(crtc);  in dce_v11_0_crtc_mode_set()
2808 static bool dce_v11_0_crtc_mode_fixup(struct drm_crtc *crtc,  in dce_v11_0_crtc_mode_fixup()  argument
2812 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in dce_v11_0_crtc_mode_fixup()
2813 	struct drm_device *dev = crtc->dev;  in dce_v11_0_crtc_mode_fixup()
2818 		if (encoder->crtc == crtc) {  in dce_v11_0_crtc_mode_fixup()
2829 	if (!amdgpu_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))  in dce_v11_0_crtc_mode_fixup()
2831 	if (amdgpu_atombios_crtc_prepare_pll(crtc, adjusted_mode))  in dce_v11_0_crtc_mode_fixup()
2834 	amdgpu_crtc->pll_id = dce_v11_0_pick_pll(crtc);  in dce_v11_0_crtc_mode_fixup()
2843 static int dce_v11_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,  in dce_v11_0_crtc_set_base()  argument
2846 	return dce_v11_0_crtc_do_set_base(crtc, old_fb, x, y, 0);  in dce_v11_0_crtc_set_base()
2849 static int dce_v11_0_crtc_set_base_atomic(struct drm_crtc *crtc,  in dce_v11_0_crtc_set_base_atomic()  argument
2853        return dce_v11_0_crtc_do_set_base(crtc, fb, x, y, 1);  in dce_v11_0_crtc_set_base_atomic()
3156 						     int crtc,  in dce_v11_0_set_crtc_vblank_interrupt_state()  argument
3161 	if (crtc >= adev->mode_info.num_crtc) {  in dce_v11_0_set_crtc_vblank_interrupt_state()
3162 		DRM_DEBUG("invalid crtc %d\n", crtc);  in dce_v11_0_set_crtc_vblank_interrupt_state()
3168 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);  in dce_v11_0_set_crtc_vblank_interrupt_state()
3171 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);  in dce_v11_0_set_crtc_vblank_interrupt_state()
3174 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);  in dce_v11_0_set_crtc_vblank_interrupt_state()
3177 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);  in dce_v11_0_set_crtc_vblank_interrupt_state()
3185 						    int crtc,  in dce_v11_0_set_crtc_vline_interrupt_state()  argument
3190 	if (crtc >= adev->mode_info.num_crtc) {  in dce_v11_0_set_crtc_vline_interrupt_state()
3191 		DRM_DEBUG("invalid crtc %d\n", crtc);  in dce_v11_0_set_crtc_vline_interrupt_state()
3197 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);  in dce_v11_0_set_crtc_vline_interrupt_state()
3200 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);  in dce_v11_0_set_crtc_vline_interrupt_state()
3203 		lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]);  in dce_v11_0_set_crtc_vline_interrupt_state()
3206 		WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);  in dce_v11_0_set_crtc_vline_interrupt_state()
3383 					  int crtc)  in dce_v11_0_crtc_vblank_int_ack()  argument
3387 	if (crtc >= adev->mode_info.num_crtc) {  in dce_v11_0_crtc_vblank_int_ack()
3388 		DRM_DEBUG("invalid crtc %d\n", crtc);  in dce_v11_0_crtc_vblank_int_ack()
3392 	tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]);  in dce_v11_0_crtc_vblank_int_ack()
3394 	WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp);  in dce_v11_0_crtc_vblank_int_ack()
3398 					 int crtc)  in dce_v11_0_crtc_vline_int_ack()  argument
3402 	if (crtc >= adev->mode_info.num_crtc) {  in dce_v11_0_crtc_vline_int_ack()
3403 		DRM_DEBUG("invalid crtc %d\n", crtc);  in dce_v11_0_crtc_vline_int_ack()
3407 	tmp = RREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc]);  in dce_v11_0_crtc_vline_int_ack()
3409 	WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], tmp);  in dce_v11_0_crtc_vline_int_ack()
3416 	unsigned crtc = entry->src_id - 1;  in dce_v11_0_crtc_irq()  local
3417 	uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);  in dce_v11_0_crtc_irq()
3418 	unsigned irq_type = amdgpu_crtc_idx_to_irq_type(adev, crtc);  in dce_v11_0_crtc_irq()
3422 		if (disp_int & interrupt_status_offsets[crtc].vblank)  in dce_v11_0_crtc_irq()
3423 			dce_v11_0_crtc_vblank_int_ack(adev, crtc);  in dce_v11_0_crtc_irq()
3428 			drm_handle_vblank(adev->ddev, crtc);  in dce_v11_0_crtc_irq()
3430 		DRM_DEBUG("IH: D%d vblank\n", crtc + 1);  in dce_v11_0_crtc_irq()
3434 		if (disp_int & interrupt_status_offsets[crtc].vline)  in dce_v11_0_crtc_irq()
3435 			dce_v11_0_crtc_vline_int_ack(adev, crtc);  in dce_v11_0_crtc_irq()
3439 		DRM_DEBUG("IH: D%d vline\n", crtc + 1);  in dce_v11_0_crtc_irq()
3517 	dce_v11_0_set_interleave(encoder->crtc, mode);  in dce_v11_0_encoder_mode_set()