140 		err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev);  in sdma_v2_4_init_microcode()
143 		err = amdgpu_ucode_validate(adev->sdma.instance[i].fw);  in sdma_v2_4_init_microcode()
146 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data;  in sdma_v2_4_init_microcode()
147 		adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);  in sdma_v2_4_init_microcode()
148 		adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);  in sdma_v2_4_init_microcode()
149 		if (adev->sdma.instance[i].feature_version >= 20)  in sdma_v2_4_init_microcode()
150 			adev->sdma.instance[i].burst_nop = true;  in sdma_v2_4_init_microcode()
155 			info->fw = adev->sdma.instance[i].fw;  in sdma_v2_4_init_microcode()
168 			release_firmware(adev->sdma.instance[i].fw);  in sdma_v2_4_init_microcode()
169 			adev->sdma.instance[i].fw = NULL;  in sdma_v2_4_init_microcode()
202 	int me = (ring == &ring->adev->sdma.instance[0].ring) ? 0 : 1;  in sdma_v2_4_ring_get_wptr()
218 	int me = (ring == &ring->adev->sdma.instance[0].ring) ? 0 : 1;  in sdma_v2_4_ring_set_wptr()
287 	if (ring == &ring->adev->sdma.instance[0].ring)  in sdma_v2_4_ring_emit_hdp_flush()
371 	struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring;  in sdma_v2_4_gfx_stop()
372 	struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring;  in sdma_v2_4_gfx_stop()
449 		ring = &adev->sdma.instance[i].ring;  in sdma_v2_4_gfx_resume()
553 		if (!adev->sdma.instance[i].fw)  in sdma_v2_4_load_microcode()
555 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data;  in sdma_v2_4_load_microcode()
559 			(adev->sdma.instance[i].fw->data +  in sdma_v2_4_load_microcode()
564 		WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], adev->sdma.instance[i].fw_version);  in sdma_v2_4_load_microcode()
987 		ring = &adev->sdma.instance[i].ring;  in sdma_v2_4_sw_init()
1010 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);  in sdma_v2_4_sw_fini()
1232 			amdgpu_fence_process(&adev->sdma.instance[0].ring);  in sdma_v2_4_process_trap_irq()
1245 			amdgpu_fence_process(&adev->sdma.instance[1].ring);  in sdma_v2_4_process_trap_irq()
1318 		adev->sdma.instance[i].ring.funcs = &sdma_v2_4_ring_funcs;  in sdma_v2_4_set_ring_funcs()
1400 		adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring;  in sdma_v2_4_set_buffer_funcs()
1415 		adev->vm_manager.vm_pte_funcs_ring = &adev->sdma.instance[0].ring;  in sdma_v2_4_set_vm_pte_funcs()