Lines Matching refs:uint32_t

122 				const uint32_t *ih_ring_entry);
124 				const uint32_t *ih_ring_entry);
138 	uint32_t range_start;
139 	uint32_t range_end;
141 	uint32_t *cpu_ptr;
320 	uint32_t priority;
321 	uint32_t queue_percent;
322 	uint32_t *read_ptr;
323 	uint32_t *write_ptr;
324 	uint32_t __iomem *doorbell_ptr;
325 	uint32_t doorbell_off;
331 	uint32_t sdma_engine_id;
332 	uint32_t sdma_queue_id;
333 	uint32_t sdma_vm_addr;
336 	uint32_t eop_ring_buffer_size;
338 	uint32_t ctx_save_restore_area_size;
377 	uint32_t mec;
378 	uint32_t pipe;
379 	uint32_t queue;
403 	uint32_t oac_mask;
404 	uint32_t gds_heap_base;
405 	uint32_t gds_heap_size;
431 	uint32_t sh_mem_config;
432 	uint32_t sh_mem_bases;
433 	uint32_t sh_mem_ape1_base;
434 	uint32_t sh_mem_ape1_limit;
435 	uint32_t page_table_base;
436 	uint32_t gds_size;
437 	uint32_t num_gws;
438 	uint32_t num_oac;
601 struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
610 bool interrupt_is_wanted(struct kfd_dev *dev, const uint32_t *ih_ring_entry);
620 inline uint32_t lower_32(uint64_t x);
621 inline uint32_t upper_32(uint64_t x);
623 inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m);
690 				uint32_t fence_value);
694 			uint32_t filter_param, bool reset,
717 		       uint32_t num_events, void __user *data,
718 		       bool all, uint32_t user_timeout_ms,
720 void kfd_signal_event_interrupt(unsigned int pasid, uint32_t partial_id,
721 				uint32_t valid_id_bits);
726 int kfd_set_event(struct kfd_process *p, uint32_t event_id);
727 int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
729 		     uint32_t event_type, bool auto_reset, uint32_t node_id,
730 		     uint32_t *event_id, uint32_t *event_trigger_data,
731 		     uint64_t *event_page_offset, uint32_t *event_slot_index);
732 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);