Lines Matching refs:I915_READ
618 addr = I915_HI_DISPBASE(I915_READ(DSPSURF(crtc->plane))); in i915_gem_pageflip_info()
620 addr = I915_READ(DSPADDR(crtc->plane)); in i915_gem_pageflip_info()
777 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
780 I915_READ(VLV_IER)); in i915_interrupt_info()
782 I915_READ(VLV_IIR)); in i915_interrupt_info()
784 I915_READ(VLV_IIR_RW)); in i915_interrupt_info()
786 I915_READ(VLV_IMR)); in i915_interrupt_info()
790 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
793 I915_READ(PORT_HOTPLUG_EN)); in i915_interrupt_info()
795 I915_READ(VLV_DPFLIPSTAT)); in i915_interrupt_info()
797 I915_READ(DPINVGTT)); in i915_interrupt_info()
801 i, I915_READ(GEN8_GT_IMR(i))); in i915_interrupt_info()
803 i, I915_READ(GEN8_GT_IIR(i))); in i915_interrupt_info()
805 i, I915_READ(GEN8_GT_IER(i))); in i915_interrupt_info()
809 I915_READ(GEN8_PCU_IMR)); in i915_interrupt_info()
811 I915_READ(GEN8_PCU_IIR)); in i915_interrupt_info()
813 I915_READ(GEN8_PCU_IER)); in i915_interrupt_info()
816 I915_READ(GEN8_MASTER_IRQ)); in i915_interrupt_info()
820 i, I915_READ(GEN8_GT_IMR(i))); in i915_interrupt_info()
822 i, I915_READ(GEN8_GT_IIR(i))); in i915_interrupt_info()
824 i, I915_READ(GEN8_GT_IER(i))); in i915_interrupt_info()
836 I915_READ(GEN8_DE_PIPE_IMR(pipe))); in i915_interrupt_info()
839 I915_READ(GEN8_DE_PIPE_IIR(pipe))); in i915_interrupt_info()
842 I915_READ(GEN8_DE_PIPE_IER(pipe))); in i915_interrupt_info()
846 I915_READ(GEN8_DE_PORT_IMR)); in i915_interrupt_info()
848 I915_READ(GEN8_DE_PORT_IIR)); in i915_interrupt_info()
850 I915_READ(GEN8_DE_PORT_IER)); in i915_interrupt_info()
853 I915_READ(GEN8_DE_MISC_IMR)); in i915_interrupt_info()
855 I915_READ(GEN8_DE_MISC_IIR)); in i915_interrupt_info()
857 I915_READ(GEN8_DE_MISC_IER)); in i915_interrupt_info()
860 I915_READ(GEN8_PCU_IMR)); in i915_interrupt_info()
862 I915_READ(GEN8_PCU_IIR)); in i915_interrupt_info()
864 I915_READ(GEN8_PCU_IER)); in i915_interrupt_info()
867 I915_READ(VLV_IER)); in i915_interrupt_info()
869 I915_READ(VLV_IIR)); in i915_interrupt_info()
871 I915_READ(VLV_IIR_RW)); in i915_interrupt_info()
873 I915_READ(VLV_IMR)); in i915_interrupt_info()
877 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
880 I915_READ(VLV_MASTER_IER)); in i915_interrupt_info()
883 I915_READ(GTIER)); in i915_interrupt_info()
885 I915_READ(GTIIR)); in i915_interrupt_info()
887 I915_READ(GTIMR)); in i915_interrupt_info()
890 I915_READ(GEN6_PMIER)); in i915_interrupt_info()
892 I915_READ(GEN6_PMIIR)); in i915_interrupt_info()
894 I915_READ(GEN6_PMIMR)); in i915_interrupt_info()
897 I915_READ(PORT_HOTPLUG_EN)); in i915_interrupt_info()
899 I915_READ(VLV_DPFLIPSTAT)); in i915_interrupt_info()
901 I915_READ(DPINVGTT)); in i915_interrupt_info()
905 I915_READ(IER)); in i915_interrupt_info()
907 I915_READ(IIR)); in i915_interrupt_info()
909 I915_READ(IMR)); in i915_interrupt_info()
913 I915_READ(PIPESTAT(pipe))); in i915_interrupt_info()
916 I915_READ(DEIER)); in i915_interrupt_info()
918 I915_READ(DEIIR)); in i915_interrupt_info()
920 I915_READ(DEIMR)); in i915_interrupt_info()
922 I915_READ(SDEIER)); in i915_interrupt_info()
924 I915_READ(SDEIIR)); in i915_interrupt_info()
926 I915_READ(SDEIMR)); in i915_interrupt_info()
928 I915_READ(GTIER)); in i915_interrupt_info()
930 I915_READ(GTIIR)); in i915_interrupt_info()
932 I915_READ(GTIMR)); in i915_interrupt_info()
1157 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); in i915_frequency_info()
1159 rp_state_cap = I915_READ(BXT_RP_STATE_CAP); in i915_frequency_info()
1160 gt_perf_status = I915_READ(BXT_GT_PERF_STATUS); in i915_frequency_info()
1162 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); in i915_frequency_info()
1163 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); in i915_frequency_info()
1173 reqf = I915_READ(GEN6_RPNSWREQ); in i915_frequency_info()
1185 rpmodectl = I915_READ(GEN6_RP_CONTROL); in i915_frequency_info()
1186 rpinclimit = I915_READ(GEN6_RP_UP_THRESHOLD); in i915_frequency_info()
1187 rpdeclimit = I915_READ(GEN6_RP_DOWN_THRESHOLD); in i915_frequency_info()
1189 rpstat = I915_READ(GEN6_RPSTAT1); in i915_frequency_info()
1190 rpupei = I915_READ(GEN6_RP_CUR_UP_EI); in i915_frequency_info()
1191 rpcurup = I915_READ(GEN6_RP_CUR_UP); in i915_frequency_info()
1192 rpprevup = I915_READ(GEN6_RP_PREV_UP); in i915_frequency_info()
1193 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI); in i915_frequency_info()
1194 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); in i915_frequency_info()
1195 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); in i915_frequency_info()
1208 pm_ier = I915_READ(GEN6_PMIER); in i915_frequency_info()
1209 pm_imr = I915_READ(GEN6_PMIMR); in i915_frequency_info()
1210 pm_isr = I915_READ(GEN6_PMISR); in i915_frequency_info()
1211 pm_iir = I915_READ(GEN6_PMIIR); in i915_frequency_info()
1212 pm_mask = I915_READ(GEN6_PMINTRMSK); in i915_frequency_info()
1214 pm_ier = I915_READ(GEN8_GT_IER(2)); in i915_frequency_info()
1215 pm_imr = I915_READ(GEN8_GT_IMR(2)); in i915_frequency_info()
1216 pm_isr = I915_READ(GEN8_GT_ISR(2)); in i915_frequency_info()
1217 pm_iir = I915_READ(GEN8_GT_IIR(2)); in i915_frequency_info()
1218 pm_mask = I915_READ(GEN6_PMINTRMSK); in i915_frequency_info()
1385 rgvmodectl = I915_READ(MEMMODECTL); in ironlake_drpc_info()
1386 rstdbyctl = I915_READ(RSTDBYCTL); in ironlake_drpc_info()
1467 pw_status = I915_READ(VLV_GTLC_PW_STATUS); in vlv_drpc_info()
1468 rpmodectl1 = I915_READ(GEN6_RP_CONTROL); in vlv_drpc_info()
1469 rcctl1 = I915_READ(GEN6_RC_CONTROL); in vlv_drpc_info()
1491 I915_READ(VLV_GT_RENDER_RC6)); in vlv_drpc_info()
1493 I915_READ(VLV_GT_MEDIA_RC6)); in vlv_drpc_info()
1529 rpmodectl1 = I915_READ(GEN6_RP_CONTROL); in gen6_drpc_info()
1530 rcctl1 = I915_READ(GEN6_RC_CONTROL); in gen6_drpc_info()
1580 I915_READ(GEN6_GT_GFX_RC6_LOCKED)); in gen6_drpc_info()
1582 I915_READ(GEN6_GT_GFX_RC6)); in gen6_drpc_info()
1584 I915_READ(GEN6_GT_GFX_RC6p)); in gen6_drpc_info()
1586 I915_READ(GEN6_GT_GFX_RC6pp)); in gen6_drpc_info()
1647 yesno(I915_READ(FBC_STATUS2) & in i915_fbc_status()
1680 reg = I915_READ(ILK_DPFC_CONTROL); in i915_fbc_fc_set()
1714 if (I915_READ(IPS_CTL) & IPS_ENABLE) in i915_ips_status()
1735 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; in i915_sr_status()
1738 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; in i915_sr_status()
1740 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; in i915_sr_status()
1742 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; in i915_sr_status()
1744 sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; in i915_sr_status()
2079 status = I915_READ(RING_EXECLIST_STATUS_LO(ring)); in i915_execlists()
2080 ctx_id = I915_READ(RING_EXECLIST_STATUS_HI(ring)); in i915_execlists()
2084 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring)); in i915_execlists()
2095 status = I915_READ(RING_CONTEXT_STATUS_BUF_LO(ring, i)); in i915_execlists()
2096 ctx_id = I915_READ(RING_CONTEXT_STATUS_BUF_HI(ring, i)); in i915_execlists()
2172 I915_READ(DCC)); in i915_swizzle_info()
2174 I915_READ(DCC2)); in i915_swizzle_info()
2181 I915_READ(MAD_DIMM_C0)); in i915_swizzle_info()
2183 I915_READ(MAD_DIMM_C1)); in i915_swizzle_info()
2185 I915_READ(MAD_DIMM_C2)); in i915_swizzle_info()
2187 I915_READ(TILECTL)); in i915_swizzle_info()
2190 I915_READ(GAMTARBMODE)); in i915_swizzle_info()
2193 I915_READ(ARB_MODE)); in i915_swizzle_info()
2195 I915_READ(DISP_ARB_CTL)); in i915_swizzle_info()
2241 u64 pdp = I915_READ(GEN8_RING_PDP_UDW(ring, i)); in gen8_ppgtt_info()
2243 pdp |= I915_READ(GEN8_RING_PDP_LDW(ring, i)); in gen8_ppgtt_info()
2256 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); in gen6_ppgtt_info()
2261 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring))); in gen6_ppgtt_info()
2262 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring))); in gen6_ppgtt_info()
2263 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring))); in gen6_ppgtt_info()
2264 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring))); in gen6_ppgtt_info()
2275 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); in gen6_ppgtt_info()
2406 tmp = I915_READ(GUC_STATUS); in i915_guc_load_status_info()
2417 seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i))); in i915_guc_load_status_info()
2553 enabled = I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE; in i915_edp_psr_status()
2556 stat[pipe] = I915_READ(VLV_PSRSTAT(pipe)) & in i915_edp_psr_status()
2575 psrperf = I915_READ(EDP_PSR_PERF_CNT(dev)) & in i915_edp_psr_status()
2642 power = I915_READ(MCH_SECP_NRG_STTS); in i915_energy_uJ()
2924 state = I915_READ(CURCNTR(PIPE_A)) & CURSOR_ENABLE; in cursor_active()
2926 state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE; in cursor_active()
2936 pos = I915_READ(CURPOS(pipe)); in cursor_position()
3054 I915_READ(ring->semaphore.mbox.signal[j])); in i915_semaphore_status()
3121 read = I915_READ(addr); in i915_wa_registers()
3635 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in vlv_pipe_crc_ctl_reg()
3715 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in i9xx_pipe_crc_ctl_reg()
3720 I915_READ(PORT_DFT_I9XX) | DC_BALANCE_RESET); in i9xx_pipe_crc_ctl_reg()
3737 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in vlv_undo_pipe_scramble_reset()
3762 uint32_t tmp = I915_READ(PORT_DFT2_G4X); in g4x_undo_pipe_scramble_reset()
3772 I915_READ(PORT_DFT_I9XX) & ~DC_BALANCE_RESET); in g4x_undo_pipe_scramble_reset()
4910 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); in i915_cache_sharing_get()
4937 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); in i915_cache_sharing_set()
4966 sig1[0] = I915_READ(CHV_POWER_SS0_SIG1); in cherryview_sseu_device_status()
4967 sig1[1] = I915_READ(CHV_POWER_SS1_SIG1); in cherryview_sseu_device_status()
4968 sig2[0] = I915_READ(CHV_POWER_SS0_SIG2); in cherryview_sseu_device_status()
4969 sig2[1] = I915_READ(CHV_POWER_SS1_SIG2); in cherryview_sseu_device_status()
5005 s_reg[s] = I915_READ(GEN9_SLICE_PGCTL_ACK(s)); in gen9_sseu_device_status()
5006 eu_reg[2*s] = I915_READ(GEN9_SS01_EU_PGCTL_ACK(s)); in gen9_sseu_device_status()
5007 eu_reg[2*s + 1] = I915_READ(GEN9_SS23_EU_PGCTL_ACK(s)); in gen9_sseu_device_status()
5060 u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO); in broadwell_sseu_device_status()