150 	u32 adpa;  in intel_crt_set_dpms()  local
153 		adpa = ADPA_HOTPLUG_BITS;  in intel_crt_set_dpms()
155 		adpa = 0;  in intel_crt_set_dpms()
158 		adpa |= ADPA_HSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
160 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
166 		adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);  in intel_crt_set_dpms()
168 		adpa |= ADPA_PIPE_A_SELECT;  in intel_crt_set_dpms()
170 		adpa |= ADPA_PIPE_B_SELECT;  in intel_crt_set_dpms()
177 		adpa |= ADPA_DAC_ENABLE;  in intel_crt_set_dpms()
180 		adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
183 		adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
186 		adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
190 	I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_set_dpms()
278 	u32 adpa;  in intel_ironlake_crt_detect_hotplug()  local
288 		save_adpa = adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
289 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in intel_ironlake_crt_detect_hotplug()
291 		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in intel_ironlake_crt_detect_hotplug()
293 			adpa &= ~ADPA_DAC_ENABLE;  in intel_ironlake_crt_detect_hotplug()
295 		I915_WRITE(crt->adpa_reg, adpa);  in intel_ironlake_crt_detect_hotplug()
308 	adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
309 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in intel_ironlake_crt_detect_hotplug()
313 	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);  in intel_ironlake_crt_detect_hotplug()
323 	u32 adpa;  in valleyview_crt_detect_hotplug()  local
327 	save_adpa = adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
328 	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in valleyview_crt_detect_hotplug()
330 	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in valleyview_crt_detect_hotplug()
332 	I915_WRITE(crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
341 	adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
342 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in valleyview_crt_detect_hotplug()
347 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);  in valleyview_crt_detect_hotplug()
718 		u32 adpa;  in intel_crt_reset()  local
720 		adpa = I915_READ(crt->adpa_reg);  in intel_crt_reset()
721 		adpa &= ~ADPA_CRT_HOTPLUG_MASK;  in intel_crt_reset()
722 		adpa |= ADPA_HOTPLUG_BITS;  in intel_crt_reset()
723 		I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_reset()
726 		DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);  in intel_crt_reset()