616 	} else if (IS_CHERRYVIEW(dev)) {  in intel_limit()
919 	if (IS_CHERRYVIEW(dev)) {  in vlv_PLL_is_optimal()
1488 	} else if (IS_CHERRYVIEW(dev_priv->dev)) {  in dp_pipe_enabled()
1507 	} else if (IS_CHERRYVIEW(dev_priv->dev)) {  in hdmi_pipe_enabled()
1648 	BUG_ON(!IS_CHERRYVIEW(dev_priv->dev));  in chv_enable_pll()
2732 	} else if (IS_CHERRYVIEW(dev) && plane == PLANE_B) {  in i9xx_update_primary_plane()
5386 	else if (IS_CHERRYVIEW(dev_priv))  in intel_compute_max_dotclk()
5424 	} else if (IS_CHERRYVIEW(dev)) {  in intel_update_max_cdclk()
5972 	int limit = IS_CHERRYVIEW(dev_priv) ? 95 : 90;  in valleyview_calc_cdclk()
5987 	if (!IS_CHERRYVIEW(dev_priv) &&  in valleyview_calc_cdclk()
6076 	if (IS_CHERRYVIEW(dev_priv))  in vlv_program_pfi_credits()
6083 		if (IS_CHERRYVIEW(dev_priv))  in vlv_program_pfi_credits()
6125 	if (IS_CHERRYVIEW(dev))  in valleyview_modeset_commit_cdclk()
6154 	if (IS_CHERRYVIEW(dev) && pipe == PIPE_B) {  in valleyview_crtc_enable()
6172 		if (IS_CHERRYVIEW(dev)) {  in valleyview_crtc_enable()
6298 		if (IS_CHERRYVIEW(dev))  in i9xx_crtc_disable()
7261 		if (m2_n2 && (IS_CHERRYVIEW(dev) || INTEL_INFO(dev)->gen < 8) &&  in intel_cpu_transcoder_set_m_n()
7554 	if (IS_CHERRYVIEW(dev)) {  in vlv_force_pll_on()
7575 	if (IS_CHERRYVIEW(dev))  in vlv_force_pll_off()
7961 	} else if (IS_CHERRYVIEW(dev)) {  in i9xx_crtc_compute_clock()
8209 	if (IS_CHERRYVIEW(dev))  in i9xx_get_pipe_config()
13790 	if (IS_CHERRYVIEW(plane->dev) && pipe == PIPE_C &&  in intel_check_cursor_plane()
14062 	if (IS_CHERRYVIEW(dev))  in intel_crt_present()
14174 		if (IS_CHERRYVIEW(dev)) {  in intel_setup_outputs()
14503 	else if (IS_CHERRYVIEW(dev))  in intel_init_display()