74 		I915_WRITE(reg, val);  in write_data()
133 		I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL);  in intel_dsi_host_transfer()
140 	I915_WRITE(ctrl_reg, header[2] << 16 | header[1] << 8 | header[0]);  in intel_dsi_host_transfer()
226 	I915_WRITE(MIPI_INTR_STAT(port), SPL_PKT_SENT_INTERRUPT);  in dpi_send_cmd()
232 	I915_WRITE(MIPI_DPI_CONTROL(port), cmd);  in dpi_send_cmd()
299 		I915_WRITE(BXT_MIPI_PORT_CTRL(port), val | LP_OUTPUT_HOLD);  in bxt_dsi_device_ready()
306 		I915_WRITE(MIPI_DEVICE_READY(port), val);  in bxt_dsi_device_ready()
313 		I915_WRITE(MIPI_DEVICE_READY(port), val);  in bxt_dsi_device_ready()
320 		I915_WRITE(MIPI_DEVICE_READY(port), val);  in bxt_dsi_device_ready()
344 		I915_WRITE(MIPI_DEVICE_READY(port), ULPS_STATE_ENTER);  in vlv_dsi_device_ready()
352 		I915_WRITE(MIPI_PORT_CTRL(PORT_A), val | LP_OUTPUT_HOLD);  in vlv_dsi_device_ready()
355 		I915_WRITE(MIPI_DEVICE_READY(port), ULPS_STATE_EXIT);  in vlv_dsi_device_ready()
358 		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY);  in vlv_dsi_device_ready()
388 		I915_WRITE(VLV_CHICKEN_3, temp);  in intel_dsi_port_enable()
408 		I915_WRITE(port_ctrl, temp | DPI_ENABLE);  in intel_dsi_port_enable()
427 		I915_WRITE(port_ctrl, temp & ~DPI_ENABLE);  in intel_dsi_port_disable()
443 			I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(port), 8 * 4);  in intel_dsi_enable()
486 		I915_WRITE(DPLL(pipe), tmp);  in intel_dsi_pre_enable()
495 		I915_WRITE(DSPCLK_GATE_D, tmp);  in intel_dsi_pre_enable()
558 		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);  in intel_dsi_disable()
561 		I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);  in intel_dsi_disable()
565 		I915_WRITE(MIPI_DSI_FUNC_PRG(port), temp);  in intel_dsi_disable()
567 		I915_WRITE(MIPI_DEVICE_READY(port), 0x1);  in intel_dsi_disable()
589 		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |  in intel_dsi_clear_device_ready()
593 		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |  in intel_dsi_clear_device_ready()
597 		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |  in intel_dsi_clear_device_ready()
616 		I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);  in intel_dsi_clear_device_ready()
619 		I915_WRITE(MIPI_DEVICE_READY(port), 0x00);  in intel_dsi_clear_device_ready()
640 	I915_WRITE(DSPCLK_GATE_D, val);  in intel_dsi_post_disable()
815 			I915_WRITE(BXT_MIPI_TRANS_HACTIVE(port),  in set_dsi_timings()
817 			I915_WRITE(BXT_MIPI_TRANS_VACTIVE(port),  in set_dsi_timings()
819 			I915_WRITE(BXT_MIPI_TRANS_VTOTAL(port),  in set_dsi_timings()
823 		I915_WRITE(MIPI_HACTIVE_AREA_COUNT(port), hactive);  in set_dsi_timings()
824 		I915_WRITE(MIPI_HFP_COUNT(port), hfp);  in set_dsi_timings()
828 		I915_WRITE(MIPI_HSYNC_PADDING_COUNT(port), hsync);  in set_dsi_timings()
829 		I915_WRITE(MIPI_HBP_COUNT(port), hbp);  in set_dsi_timings()
832 		I915_WRITE(MIPI_VFP_COUNT(port), vfp);  in set_dsi_timings()
833 		I915_WRITE(MIPI_VSYNC_PADDING_COUNT(port), vsync);  in set_dsi_timings()
834 		I915_WRITE(MIPI_VBP_COUNT(port), vbp);  in set_dsi_timings()
869 			I915_WRITE(MIPI_CTRL(PORT_A), tmp |  in intel_dsi_prepare()
875 			I915_WRITE(MIPI_CTRL(port), tmp |  in intel_dsi_prepare()
893 			I915_WRITE(MIPI_CTRL(port), tmp);  in intel_dsi_prepare()
897 		I915_WRITE(MIPI_INTR_STAT(port), 0xffffffff);  in intel_dsi_prepare()
898 		I915_WRITE(MIPI_INTR_EN(port), 0xffffffff);  in intel_dsi_prepare()
900 		I915_WRITE(MIPI_DPHY_PARAM(port), intel_dsi->dphy_reg);  in intel_dsi_prepare()
902 		I915_WRITE(MIPI_DPI_RESOLUTION(port),  in intel_dsi_prepare()
927 		I915_WRITE(MIPI_DSI_FUNC_PRG(port), val);  in intel_dsi_prepare()
948 			I915_WRITE(MIPI_HS_TX_TIMEOUT(port),  in intel_dsi_prepare()
953 			I915_WRITE(MIPI_HS_TX_TIMEOUT(port),  in intel_dsi_prepare()
959 		I915_WRITE(MIPI_LP_RX_TIMEOUT(port), intel_dsi->lp_rx_timeout);  in intel_dsi_prepare()
960 		I915_WRITE(MIPI_TURN_AROUND_TIMEOUT(port),  in intel_dsi_prepare()
962 		I915_WRITE(MIPI_DEVICE_RESET_TIMER(port),  in intel_dsi_prepare()
968 		I915_WRITE(MIPI_INIT_COUNT(port),  in intel_dsi_prepare()
978 			I915_WRITE(MIPI_INIT_COUNT(port ==  in intel_dsi_prepare()
984 		I915_WRITE(MIPI_EOT_DISABLE(port), tmp);  in intel_dsi_prepare()
987 		I915_WRITE(MIPI_INIT_COUNT(port), intel_dsi->init_count);  in intel_dsi_prepare()
994 		I915_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT(port),  in intel_dsi_prepare()
1003 		I915_WRITE(MIPI_LP_BYTECLK(port), intel_dsi->lp_byte_clk);  in intel_dsi_prepare()
1010 		I915_WRITE(MIPI_DBI_BW_CTRL(port), intel_dsi->bw_timer);  in intel_dsi_prepare()
1012 		I915_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT(port),  in intel_dsi_prepare()
1020 			I915_WRITE(MIPI_VIDEO_MODE_FORMAT(port),  in intel_dsi_prepare()