2815 			  struct skl_ddb_allocation *ddb /* out */)  in skl_ddb_get_hw_state()  argument
2821 	memset(ddb, 0, sizeof(*ddb));  in skl_ddb_get_hw_state()
2829 			skl_ddb_entry_init_from_hw(&ddb->plane[pipe][plane],  in skl_ddb_get_hw_state()
2834 		skl_ddb_entry_init_from_hw(&ddb->plane[pipe][PLANE_CURSOR],  in skl_ddb_get_hw_state()
2887 		      struct skl_ddb_allocation *ddb /* out */)  in skl_allocate_pipe_ddb()  argument
2893 	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];  in skl_allocate_pipe_ddb()
2903 		memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));  in skl_allocate_pipe_ddb()
2904 		memset(&ddb->plane[pipe][PLANE_CURSOR], 0,  in skl_allocate_pipe_ddb()
2905 		       sizeof(ddb->plane[pipe][PLANE_CURSOR]));  in skl_allocate_pipe_ddb()
2910 	ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - cursor_blocks;  in skl_allocate_pipe_ddb()
2911 	ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;  in skl_allocate_pipe_ddb()
2959 		ddb->plane[pipe][plane].start = start;  in skl_allocate_pipe_ddb()
2960 		ddb->plane[pipe][plane].end = start + plane_blocks;  in skl_allocate_pipe_ddb()
2973 			ddb->y_plane[pipe][plane].start = start;  in skl_allocate_pipe_ddb()
2974 			ddb->y_plane[pipe][plane].end = start + y_plane_blocks;  in skl_allocate_pipe_ddb()
3043 	const struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb;  in skl_ddb_allocation_changed()
3214 				 struct skl_ddb_allocation *ddb,  in skl_compute_wm_level()  argument
3225 		ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);  in skl_compute_wm_level()
3235 	ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][PLANE_CURSOR]);  in skl_compute_wm_level()
3272 				struct skl_ddb_allocation *ddb,  in skl_compute_pipe_wm()  argument
3282 		skl_compute_wm_level(dev_priv, ddb, params, intel_crtc->pipe,  in skl_compute_pipe_wm()
3389 					    &new->ddb.plane[pipe][i]);  in skl_write_wm_values()
3392 					    &new->ddb.y_plane[pipe][i]);  in skl_write_wm_values()
3396 				    &new->ddb.plane[pipe][PLANE_CURSOR]);  in skl_write_wm_values()
3462 	new_ddb = &new_values->ddb;  in skl_flush_wm_values()
3463 	cur_ddb = &dev_priv->wm.skl_hw.ddb;  in skl_flush_wm_values()
3538 			       struct skl_ddb_allocation *ddb, /* out */  in skl_update_pipe_wm()  argument
3544 	skl_allocate_pipe_ddb(crtc, config, params, ddb);  in skl_update_pipe_wm()
3545 	skl_compute_pipe_wm(crtc, ddb, params, pipe_wm);  in skl_update_pipe_wm()
3569 	if (!skl_ddb_allocation_changed(&r->ddb, this_crtc))  in skl_update_other_pipe_wm()
3590 						&r->ddb, &pipe_wm);  in skl_update_other_pipe_wm()
3614 	memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry));  in skl_clear_wm()
3615 	memset(&watermarks->ddb.plane[pipe], 0,  in skl_clear_wm()
3617 	memset(&watermarks->ddb.y_plane[pipe], 0,  in skl_clear_wm()
3619 	memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0,  in skl_clear_wm()
3643 				&results->ddb, &pipe_wm))  in skl_update_wm()
3857 	struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;  in skl_wm_get_hw_state()  local
3860 	skl_ddb_get_hw_state(dev_priv, ddb);  in skl_wm_get_hw_state()