819 static void vlv_write_wm_values(struct intel_crtc *crtc,  in vlv_write_wm_values()
929 				     struct intel_crtc *crtc,  in vlv_compute_wm_level()
965 static void vlv_compute_fifo(struct intel_crtc *crtc)  in vlv_compute_fifo()
1032 static void vlv_invert_wms(struct intel_crtc *crtc)  in vlv_invert_wms()
1066 static void vlv_compute_wm(struct intel_crtc *crtc)  in vlv_compute_wm()
1168 static void vlv_pipe_set_fifo_size(struct intel_crtc *crtc)  in vlv_pipe_set_fifo_size()
1258 	struct intel_crtc *crtc;  in vlv_merge_wm()
1305 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in vlv_update_wm()  local
1306 	enum pipe pipe = intel_crtc->pipe;  in vlv_update_wm()
1309 	vlv_compute_wm(intel_crtc);  in vlv_update_wm()
1314 		vlv_pipe_set_fifo_size(intel_crtc);  in vlv_update_wm()
1330 	vlv_pipe_set_fifo_size(intel_crtc);  in vlv_update_wm()
1332 	vlv_write_wm_values(intel_crtc, &wm);  in vlv_update_wm()
1979 				 const struct intel_crtc *intel_crtc,  in ilk_compute_wm_level()  argument
1996 	for_each_intel_plane_on_crtc(dev_priv->dev, intel_crtc, intel_plane) {  in ilk_compute_wm_level()
2026 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in hsw_compute_linetime_wm()  local
2027 	const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;  in hsw_compute_linetime_wm()
2030 	if (!intel_crtc->active)  in hsw_compute_linetime_wm()
2280 	struct intel_crtc *intel_crtc;  in ilk_compute_wm_config()  local
2283 	for_each_intel_crtc(dev, intel_crtc) {  in ilk_compute_wm_config()
2284 		const struct intel_pipe_wm *wm = &intel_crtc->wm.active;  in ilk_compute_wm_config()
2302 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in intel_compute_pipe_wm()  local
2312 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {  in intel_compute_pipe_wm()
2336 	ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate, &pipe_wm->wm[0]);  in intel_compute_pipe_wm()
2353 		ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate, &wm);  in intel_compute_pipe_wm()
2376 	const struct intel_crtc *intel_crtc;  in ilk_merge_wm_level()  local
2380 	for_each_intel_crtc(dev, intel_crtc) {  in ilk_merge_wm_level()
2381 		const struct intel_pipe_wm *active = &intel_crtc->wm.active;  in ilk_merge_wm_level()
2483 	struct intel_crtc *intel_crtc;  in ilk_compute_wm_results()  local
2528 	for_each_intel_crtc(dev, intel_crtc) {  in ilk_compute_wm_results()
2529 		enum pipe pipe = intel_crtc->pipe;  in ilk_compute_wm_results()
2531 			&intel_crtc->wm.active.wm[0];  in ilk_compute_wm_results()
2536 		results->wm_linetime[pipe] = intel_crtc->wm.active.linetime;  in ilk_compute_wm_results()
2861 skl_get_total_relative_data_rate(struct intel_crtc *intel_crtc,  in skl_get_total_relative_data_rate()  argument
2867 	for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) {  in skl_get_total_relative_data_rate()
2891 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_allocate_pipe_ddb()  local
2892 	enum pipe pipe = intel_crtc->pipe;  in skl_allocate_pipe_ddb()
2936 	total_data_rate = skl_get_total_relative_data_rate(intel_crtc, params);  in skl_allocate_pipe_ddb()
2939 	for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) {  in skl_allocate_pipe_ddb()
3039 				       const struct intel_crtc *intel_crtc)  in skl_ddb_allocation_changed()  argument
3041 	struct drm_device *dev = intel_crtc->base.dev;  in skl_ddb_allocation_changed()
3044 	enum pipe pipe = intel_crtc->pipe;  in skl_ddb_allocation_changed()
3079 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_compute_wm_pipe_parameters()  local
3080 	enum pipe pipe = intel_crtc->pipe;  in skl_compute_wm_pipe_parameters()
3085 	p->active = intel_crtc->active;  in skl_compute_wm_pipe_parameters()
3087 		p->pipe_htotal = intel_crtc->config->base.adjusted_mode.crtc_htotal;  in skl_compute_wm_pipe_parameters()
3088 		p->pixel_rate = skl_pipe_pixel_rate(intel_crtc->config);  in skl_compute_wm_pipe_parameters()
3106 		p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w;  in skl_compute_wm_pipe_parameters()
3107 		p->plane[0].vert_pixels = intel_crtc->config->pipe_src_h;  in skl_compute_wm_pipe_parameters()
3259 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_compute_transition_wm()  local
3266 	for (i = 0; i < intel_num_planes(intel_crtc); i++)  in skl_compute_transition_wm()
3278 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_compute_pipe_wm()  local
3282 		skl_compute_wm_level(dev_priv, ddb, params, intel_crtc->pipe,  in skl_compute_pipe_wm()
3283 				     level, intel_num_planes(intel_crtc),  in skl_compute_pipe_wm()
3295 				   struct intel_crtc *intel_crtc)  in skl_compute_wm_results()  argument
3298 	enum pipe pipe = intel_crtc->pipe;  in skl_compute_wm_results()
3303 		for (i = 0; i < intel_num_planes(intel_crtc); i++) {  in skl_compute_wm_results()
3328 	for (i = 0; i < intel_num_planes(intel_crtc); i++) {  in skl_compute_wm_results()
3362 	struct intel_crtc *crtc;  in skl_write_wm_values()
3459 	struct intel_crtc *crtc;  in skl_flush_wm_values()
3541 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_update_pipe_wm()  local
3547 	if (!memcmp(&intel_crtc->wm.skl_active, pipe_wm, sizeof(*pipe_wm)))  in skl_update_pipe_wm()
3550 	intel_crtc->wm.skl_active = *pipe_wm;  in skl_update_pipe_wm()
3560 	struct intel_crtc *intel_crtc;  in skl_update_other_pipe_wm()  local
3561 	struct intel_crtc *this_crtc = to_intel_crtc(crtc);  in skl_update_other_pipe_wm()
3576 	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list,  in skl_update_other_pipe_wm()
3582 		if (this_crtc->pipe == intel_crtc->pipe)  in skl_update_other_pipe_wm()
3585 		if (!intel_crtc->active)  in skl_update_other_pipe_wm()
3588 		wm_changed = skl_update_pipe_wm(&intel_crtc->base,  in skl_update_other_pipe_wm()
3599 		skl_compute_wm_results(dev, &params, &pipe_wm, r, intel_crtc);  in skl_update_other_pipe_wm()
3600 		r->dirty[intel_crtc->pipe] = true;  in skl_update_other_pipe_wm()
3626 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_update_wm()  local
3638 	skl_clear_wm(results, intel_crtc->pipe);  in skl_update_wm()
3646 	skl_compute_wm_results(dev, &params, &pipe_wm, results, intel_crtc);  in skl_update_wm()
3647 	results->dirty[intel_crtc->pipe] = true;  in skl_update_wm()
3692 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_update_wm()  local
3703 	WARN_ON(cstate->base.active != intel_crtc->active);  in ilk_update_wm()
3707 	if (!memcmp(&intel_crtc->wm.active, &pipe_wm, sizeof(pipe_wm)))  in ilk_update_wm()
3710 	intel_crtc->wm.active = pipe_wm;  in ilk_update_wm()
3807 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_pipe_wm_get_hw_state()  local
3808 	struct skl_pipe_wm *active = &intel_crtc->wm.skl_active;  in skl_pipe_wm_get_hw_state()
3809 	enum pipe pipe = intel_crtc->pipe;  in skl_pipe_wm_get_hw_state()
3818 		for (i = 0; i < intel_num_planes(intel_crtc); i++)  in skl_pipe_wm_get_hw_state()
3824 	for (i = 0; i < intel_num_planes(intel_crtc); i++)  in skl_pipe_wm_get_hw_state()
3828 	if (!intel_crtc->active)  in skl_pipe_wm_get_hw_state()
3836 		for (i = 0; i < intel_num_planes(intel_crtc); i++) {  in skl_pipe_wm_get_hw_state()
3845 	for (i = 0; i < intel_num_planes(intel_crtc); i++) {  in skl_pipe_wm_get_hw_state()
3870 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_pipe_wm_get_hw_state()  local
3871 	struct intel_pipe_wm *active = &intel_crtc->wm.active;  in ilk_pipe_wm_get_hw_state()
3872 	enum pipe pipe = intel_crtc->pipe;  in ilk_pipe_wm_get_hw_state()
3885 	active->pipe_enabled = intel_crtc->active;  in ilk_pipe_wm_get_hw_state()