Lines Matching refs:I915_READ
69 val = I915_READ(VLV_PSRSTAT(pipe)) & in vlv_is_psr_active_on_pipe()
116 val = I915_READ(VLV_VSCSDP(pipe)); in vlv_psr_setup_vsc()
197 val = I915_READ(aux_ctl_reg); in hsw_psr_enable_sink()
246 I915_WRITE(VLV_PSRCTL(pipe), I915_READ(VLV_PSRCTL(pipe)) | in vlv_psr_activate()
315 I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config->cpu_transcoder)) & in intel_psr_match_conditions()
343 WARN_ON(I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE); in intel_psr_activate()
446 if (wait_for((I915_READ(VLV_PSRSTAT(intel_crtc->pipe)) & in vlv_psr_disable()
450 val = I915_READ(VLV_PSRCTL(intel_crtc->pipe)); in vlv_psr_disable()
470 I915_READ(EDP_PSR_CTL(dev)) & ~EDP_PSR_ENABLE); in hsw_psr_disable()
473 if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL(dev)) & in hsw_psr_disable()
479 WARN_ON(I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE); in hsw_psr_disable()
526 if (wait_for((I915_READ(EDP_PSR_STATUS_CTL(dev_priv->dev)) & in intel_psr_work()
532 if (wait_for((I915_READ(VLV_PSRSTAT(pipe)) & in intel_psr_work()
569 val = I915_READ(EDP_PSR_CTL(dev)); in intel_psr_exit()
575 val = I915_READ(VLV_PSRCTL(pipe)); in intel_psr_exit()
636 val = I915_READ(VLV_PSRCTL(pipe)); in intel_psr_single_frame_update()