283 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val)  in A4XX_CGC_HLSQ_EARLY_CYC()  argument
285 	return ((val) << A4XX_CGC_HLSQ_EARLY_CYC__SHIFT) & A4XX_CGC_HLSQ_EARLY_CYC__MASK;  in A4XX_CGC_HLSQ_EARLY_CYC()
334 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()  argument
336 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_WID…  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
340 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()  argument
342 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_HE…  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
356 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val)  in A4XX_RB_MODE_CONTROL_WIDTH()  argument
358 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_WIDTH__SHIFT) & A4XX_RB_MODE_CONTROL_WIDTH__MASK;  in A4XX_RB_MODE_CONTROL_WIDTH()
362 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val)  in A4XX_RB_MODE_CONTROL_HEIGHT()  argument
364 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT) & A4XX_RB_MODE_CONTROL_HEIGHT__MASK;  in A4XX_RB_MODE_CONTROL_HEIGHT()
375 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val)  in A4XX_RB_MSAA_CONTROL_SAMPLES()  argument
377 	return ((val) << A4XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) & A4XX_RB_MSAA_CONTROL_SAMPLES__MASK;  in A4XX_RB_MSAA_CONTROL_SAMPLES()
390 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()  argument
392 …return ((val) << A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__SHIFT) & A4XX_RB_RENDER_CONTROL2_MSAA_SAMPL…  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
407 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
409 …return ((val) << A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A4XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
415 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
417 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
421 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a4xx_tile_mode val)  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
423 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
427 static inline uint32_t A4XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
429 	return ((val) << A4XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()
433 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
435 	return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()
440 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()  argument
442 …return ((val >> 4) << A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_BU…  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
450 static inline uint32_t A4XX_RB_MRT_CONTROL3_STRIDE(uint32_t val)  in A4XX_RB_MRT_CONTROL3_STRIDE()  argument
452 	return ((val) << A4XX_RB_MRT_CONTROL3_STRIDE__SHIFT) & A4XX_RB_MRT_CONTROL3_STRIDE__MASK;  in A4XX_RB_MRT_CONTROL3_STRIDE()
458 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
460 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB_…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
464 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a4xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
466 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RG…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
470 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
472 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
476 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
478 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_AL…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
482 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a4xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
484 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
488 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
490 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_A…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
496 static inline uint32_t A4XX_RB_BLEND_RED_UINT(uint32_t val)  in A4XX_RB_BLEND_RED_UINT()  argument
498 	return ((val) << A4XX_RB_BLEND_RED_UINT__SHIFT) & A4XX_RB_BLEND_RED_UINT__MASK;  in A4XX_RB_BLEND_RED_UINT()
502 static inline uint32_t A4XX_RB_BLEND_RED_FLOAT(float val)  in A4XX_RB_BLEND_RED_FLOAT()  argument
504 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_RED_FLOAT__SHIFT) & A4XX_RB_BLEND_RED_FLOAT__MA…  in A4XX_RB_BLEND_RED_FLOAT()
510 static inline uint32_t A4XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_UINT()  argument
512 	return ((val) << A4XX_RB_BLEND_GREEN_UINT__SHIFT) & A4XX_RB_BLEND_GREEN_UINT__MASK;  in A4XX_RB_BLEND_GREEN_UINT()
516 static inline uint32_t A4XX_RB_BLEND_GREEN_FLOAT(float val)  in A4XX_RB_BLEND_GREEN_FLOAT()  argument
518 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A4XX_RB_BLEND_GREEN_FLOAT…  in A4XX_RB_BLEND_GREEN_FLOAT()
524 static inline uint32_t A4XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_UINT()  argument
526 	return ((val) << A4XX_RB_BLEND_BLUE_UINT__SHIFT) & A4XX_RB_BLEND_BLUE_UINT__MASK;  in A4XX_RB_BLEND_BLUE_UINT()
530 static inline uint32_t A4XX_RB_BLEND_BLUE_FLOAT(float val)  in A4XX_RB_BLEND_BLUE_FLOAT()  argument
532 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A4XX_RB_BLEND_BLUE_FLOAT__…  in A4XX_RB_BLEND_BLUE_FLOAT()
538 static inline uint32_t A4XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_UINT()  argument
540 	return ((val) << A4XX_RB_BLEND_ALPHA_UINT__SHIFT) & A4XX_RB_BLEND_ALPHA_UINT__MASK;  in A4XX_RB_BLEND_ALPHA_UINT()
544 static inline uint32_t A4XX_RB_BLEND_ALPHA_FLOAT(float val)  in A4XX_RB_BLEND_ALPHA_FLOAT()  argument
546 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A4XX_RB_BLEND_ALPHA_FLOAT…  in A4XX_RB_BLEND_ALPHA_FLOAT()
552 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
554 	return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()
559 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
561 …return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
567 static inline uint32_t A4XX_RB_FS_OUTPUT_ENABLE_BLEND(uint32_t val)  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()  argument
569 	return ((val) << A4XX_RB_FS_OUTPUT_ENABLE_BLEND__SHIFT) & A4XX_RB_FS_OUTPUT_ENABLE_BLEND__MASK;  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()
574 static inline uint32_t A4XX_RB_FS_OUTPUT_SAMPLE_MASK(uint32_t val)  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()  argument
576 	return ((val) << A4XX_RB_FS_OUTPUT_SAMPLE_MASK__SHIFT) & A4XX_RB_FS_OUTPUT_SAMPLE_MASK__MASK;  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()
583 static inline uint32_t A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR(uint32_t val)  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()  argument
585 …return ((val >> 2) << A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT) & A4XX_RB_SAMPLE_COUNT_CONTROL_ADD…  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()
591 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT0()  argument
593 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT0()
597 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT1()  argument
599 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT1()
603 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT2()  argument
605 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT2()
609 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT3()  argument
611 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT3()
615 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT4()  argument
617 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT4()
621 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT5()  argument
623 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT5()
627 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT6()  argument
629 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT6()
633 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT7()  argument
635 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT7()
641 static inline uint32_t A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()  argument
643 …return ((val) << A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) & A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__MA…  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()
647 static inline uint32_t A4XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)  in A4XX_RB_COPY_CONTROL_MODE()  argument
649 	return ((val) << A4XX_RB_COPY_CONTROL_MODE__SHIFT) & A4XX_RB_COPY_CONTROL_MODE__MASK;  in A4XX_RB_COPY_CONTROL_MODE()
653 static inline uint32_t A4XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)  in A4XX_RB_COPY_CONTROL_FASTCLEAR()  argument
655 	return ((val) << A4XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A4XX_RB_COPY_CONTROL_FASTCLEAR__MASK;  in A4XX_RB_COPY_CONTROL_FASTCLEAR()
659 static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)  in A4XX_RB_COPY_CONTROL_GMEM_BASE()  argument
661 …return ((val >> 14) << A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A4XX_RB_COPY_CONTROL_GMEM_BASE__MA…  in A4XX_RB_COPY_CONTROL_GMEM_BASE()
667 static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val)  in A4XX_RB_COPY_DEST_BASE_BASE()  argument
669 	return ((val >> 5) << A4XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A4XX_RB_COPY_DEST_BASE_BASE__MASK;  in A4XX_RB_COPY_DEST_BASE_BASE()
675 static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)  in A4XX_RB_COPY_DEST_PITCH_PITCH()  argument
677 	return ((val >> 5) << A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A4XX_RB_COPY_DEST_PITCH_PITCH__MASK;  in A4XX_RB_COPY_DEST_PITCH_PITCH()
683 static inline uint32_t A4XX_RB_COPY_DEST_INFO_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_COPY_DEST_INFO_FORMAT()  argument
685 	return ((val) << A4XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A4XX_RB_COPY_DEST_INFO_FORMAT__MASK;  in A4XX_RB_COPY_DEST_INFO_FORMAT()
689 static inline uint32_t A4XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)  in A4XX_RB_COPY_DEST_INFO_SWAP()  argument
691 	return ((val) << A4XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A4XX_RB_COPY_DEST_INFO_SWAP__MASK;  in A4XX_RB_COPY_DEST_INFO_SWAP()
695 static inline uint32_t A4XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()  argument
697 …return ((val) << A4XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A4XX_RB_COPY_DEST_INFO_DITHER_MODE__…  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()
701 static inline uint32_t A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()  argument
703 …return ((val) << A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) & A4XX_RB_COPY_DEST_INFO_COMPONEN…  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
707 static inline uint32_t A4XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)  in A4XX_RB_COPY_DEST_INFO_ENDIAN()  argument
709 	return ((val) << A4XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) & A4XX_RB_COPY_DEST_INFO_ENDIAN__MASK;  in A4XX_RB_COPY_DEST_INFO_ENDIAN()
713 static inline uint32_t A4XX_RB_COPY_DEST_INFO_TILE(enum a4xx_tile_mode val)  in A4XX_RB_COPY_DEST_INFO_TILE()  argument
715 	return ((val) << A4XX_RB_COPY_DEST_INFO_TILE__SHIFT) & A4XX_RB_COPY_DEST_INFO_TILE__MASK;  in A4XX_RB_COPY_DEST_INFO_TILE()
721 static inline uint32_t A4XX_RB_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_RB_FS_OUTPUT_REG_MRT()  argument
723 	return ((val) << A4XX_RB_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_RB_FS_OUTPUT_REG_MRT__MASK;  in A4XX_RB_FS_OUTPUT_REG_MRT()
733 static inline uint32_t A4XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)  in A4XX_RB_DEPTH_CONTROL_ZFUNC()  argument
735 	return ((val) << A4XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A4XX_RB_DEPTH_CONTROL_ZFUNC__MASK;  in A4XX_RB_DEPTH_CONTROL_ZFUNC()
746 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum a4xx_depth_format val)  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()  argument
748 	return ((val) << A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()
752 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()  argument
754 	return ((val >> 12) << A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()
760 static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val)  in A4XX_RB_DEPTH_PITCH()  argument
762 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH__SHIFT) & A4XX_RB_DEPTH_PITCH__MASK;  in A4XX_RB_DEPTH_PITCH()
768 static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val)  in A4XX_RB_DEPTH_PITCH2()  argument
770 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH2__SHIFT) & A4XX_RB_DEPTH_PITCH2__MASK;  in A4XX_RB_DEPTH_PITCH2()
779 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC()  argument
781 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC()
785 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL()  argument
787 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL()
791 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS()  argument
793 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS()
797 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL()  argument
799 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL()
803 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
805 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()
809 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
811 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()
815 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
817 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()
821 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
823 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()
833 static inline uint32_t A4XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val)  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()  argument
835 …return ((val >> 12) << A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A4XX_RB_STENCIL_INFO_STENCIL_BA…  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()
841 static inline uint32_t A4XX_RB_STENCIL_PITCH(uint32_t val)  in A4XX_RB_STENCIL_PITCH()  argument
843 	return ((val >> 5) << A4XX_RB_STENCIL_PITCH__SHIFT) & A4XX_RB_STENCIL_PITCH__MASK;  in A4XX_RB_STENCIL_PITCH()
849 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILREF()  argument
851 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILREF__MA…  in A4XX_RB_STENCILREFMASK_STENCILREF()
855 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILMASK()  argument
857 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILMASK__…  in A4XX_RB_STENCILREFMASK_STENCILMASK()
861 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
863 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILW…  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()
869 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
871 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCILR…  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()
875 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
877 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCIL…  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()
881 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
883 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_ST…  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
890 static inline uint32_t A4XX_RB_BIN_OFFSET_X(uint32_t val)  in A4XX_RB_BIN_OFFSET_X()  argument
892 	return ((val) << A4XX_RB_BIN_OFFSET_X__SHIFT) & A4XX_RB_BIN_OFFSET_X__MASK;  in A4XX_RB_BIN_OFFSET_X()
896 static inline uint32_t A4XX_RB_BIN_OFFSET_Y(uint32_t val)  in A4XX_RB_BIN_OFFSET_Y()  argument
898 	return ((val) << A4XX_RB_BIN_OFFSET_Y__SHIFT) & A4XX_RB_BIN_OFFSET_Y__MASK;  in A4XX_RB_BIN_OFFSET_Y()
1217 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_VS_CTRL_REG0_THREADMODE()  argument
1219 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADMODE()
1225 static inline uint32_t A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
1227 …return ((val) << A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
1231 static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
1233 …return ((val) << A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
1237 static inline uint32_t A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()  argument
1239 …return ((val) << A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_VS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()
1243 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
1245 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()
1253 static inline uint32_t A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()  argument
1255 	return ((val) << A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()
1259 static inline uint32_t A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()  argument
1261 …return ((val) << A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A4XX_SP_VS_CTRL_REG1_INITIALOUT…  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
1267 static inline uint32_t A4XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_POSREGID()  argument
1269 	return ((val) << A4XX_SP_VS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_VS_PARAM_REG_POSREGID()
1273 static inline uint32_t A4XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()  argument
1275 	return ((val) << A4XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_PSIZEREGID__MASK;  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()
1279 static inline uint32_t A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()  argument
1281 …return ((val) << A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) & A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__…  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
1289 static inline uint32_t A4XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_REGID()  argument
1291 	return ((val) << A4XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_A_REGID__MASK;  in A4XX_SP_VS_OUT_REG_A_REGID()
1295 static inline uint32_t A4XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_COMPMASK()  argument
1297 	return ((val) << A4XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_A_COMPMASK()
1301 static inline uint32_t A4XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_REGID()  argument
1303 	return ((val) << A4XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_B_REGID__MASK;  in A4XX_SP_VS_OUT_REG_B_REGID()
1307 static inline uint32_t A4XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_COMPMASK()  argument
1309 	return ((val) << A4XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_B_COMPMASK()
1317 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
1319 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()
1323 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
1325 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()
1329 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
1331 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()
1335 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
1337 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()
1343 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
1345 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_C…  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1349 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
1351 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1365 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_FS_CTRL_REG0_THREADMODE()  argument
1367 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADMODE()
1373 static inline uint32_t A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
1375 …return ((val) << A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
1379 static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
1381 …return ((val) << A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
1385 static inline uint32_t A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()  argument
1387 …return ((val) << A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_FS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()
1391 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
1393 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()
1401 static inline uint32_t A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()  argument
1403 	return ((val) << A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()
1412 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
1414 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_C…  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1418 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
1420 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1434 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_MRT()  argument
1436 	return ((val) << A4XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_SP_FS_OUTPUT_REG_MRT__MASK;  in A4XX_SP_FS_OUTPUT_REG_MRT()
1441 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()  argument
1443 …return ((val) << A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MA…  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
1447 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()  argument
1449 …return ((val) << A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK…  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()
1457 static inline uint32_t A4XX_SP_FS_MRT_REG_REGID(uint32_t val)  in A4XX_SP_FS_MRT_REG_REGID()  argument
1459 	return ((val) << A4XX_SP_FS_MRT_REG_REGID__SHIFT) & A4XX_SP_FS_MRT_REG_REGID__MASK;  in A4XX_SP_FS_MRT_REG_REGID()
1464 static inline uint32_t A4XX_SP_FS_MRT_REG_MRTFORMAT(enum a4xx_color_fmt val)  in A4XX_SP_FS_MRT_REG_MRTFORMAT()  argument
1466 	return ((val) << A4XX_SP_FS_MRT_REG_MRTFORMAT__SHIFT) & A4XX_SP_FS_MRT_REG_MRTFORMAT__MASK;  in A4XX_SP_FS_MRT_REG_MRTFORMAT()
1487 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
1489 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_C…  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1493 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
1495 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1509 static inline uint32_t A4XX_SP_DS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_DS_PARAM_REG_POSREGID()  argument
1511 	return ((val) << A4XX_SP_DS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_DS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_DS_PARAM_REG_POSREGID()
1515 static inline uint32_t A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()  argument
1517 …return ((val) << A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()
1525 static inline uint32_t A4XX_SP_DS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_REGID()  argument
1527 	return ((val) << A4XX_SP_DS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_A_REGID__MASK;  in A4XX_SP_DS_OUT_REG_A_REGID()
1531 static inline uint32_t A4XX_SP_DS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_COMPMASK()  argument
1533 	return ((val) << A4XX_SP_DS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_A_COMPMASK()
1537 static inline uint32_t A4XX_SP_DS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_REGID()  argument
1539 	return ((val) << A4XX_SP_DS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_B_REGID__MASK;  in A4XX_SP_DS_OUT_REG_B_REGID()
1543 static inline uint32_t A4XX_SP_DS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_COMPMASK()  argument
1545 	return ((val) << A4XX_SP_DS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_B_COMPMASK()
1553 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()  argument
1555 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()
1559 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()  argument
1561 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()
1565 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()  argument
1567 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()
1571 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()  argument
1573 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()
1579 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
1581 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_C…  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1585 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
1587 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1601 static inline uint32_t A4XX_SP_GS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_POSREGID()  argument
1603 	return ((val) << A4XX_SP_GS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_GS_PARAM_REG_POSREGID()
1607 static inline uint32_t A4XX_SP_GS_PARAM_REG_PRIMREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_PRIMREGID()  argument
1609 	return ((val) << A4XX_SP_GS_PARAM_REG_PRIMREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_PRIMREGID__MASK;  in A4XX_SP_GS_PARAM_REG_PRIMREGID()
1613 static inline uint32_t A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()  argument
1615 …return ((val) << A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()
1623 static inline uint32_t A4XX_SP_GS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_REGID()  argument
1625 	return ((val) << A4XX_SP_GS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_A_REGID__MASK;  in A4XX_SP_GS_OUT_REG_A_REGID()
1629 static inline uint32_t A4XX_SP_GS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_COMPMASK()  argument
1631 	return ((val) << A4XX_SP_GS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_A_COMPMASK()
1635 static inline uint32_t A4XX_SP_GS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_REGID()  argument
1637 	return ((val) << A4XX_SP_GS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_B_REGID__MASK;  in A4XX_SP_GS_OUT_REG_B_REGID()
1641 static inline uint32_t A4XX_SP_GS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_COMPMASK()  argument
1643 	return ((val) << A4XX_SP_GS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_B_COMPMASK()
1651 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()  argument
1653 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()
1657 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()  argument
1659 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()
1663 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()  argument
1665 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()
1669 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()  argument
1671 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()
1677 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
1679 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_C…  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1683 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
1685 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1707 static inline uint32_t A4XX_VPC_ATTR_TOTALATTR(uint32_t val)  in A4XX_VPC_ATTR_TOTALATTR()  argument
1709 	return ((val) << A4XX_VPC_ATTR_TOTALATTR__SHIFT) & A4XX_VPC_ATTR_TOTALATTR__MASK;  in A4XX_VPC_ATTR_TOTALATTR()
1714 static inline uint32_t A4XX_VPC_ATTR_THRDASSIGN(uint32_t val)  in A4XX_VPC_ATTR_THRDASSIGN()  argument
1716 	return ((val) << A4XX_VPC_ATTR_THRDASSIGN__SHIFT) & A4XX_VPC_ATTR_THRDASSIGN__MASK;  in A4XX_VPC_ATTR_THRDASSIGN()
1723 static inline uint32_t A4XX_VPC_PACK_NUMBYPASSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMBYPASSVAR()  argument
1725 	return ((val) << A4XX_VPC_PACK_NUMBYPASSVAR__SHIFT) & A4XX_VPC_PACK_NUMBYPASSVAR__MASK;  in A4XX_VPC_PACK_NUMBYPASSVAR()
1729 static inline uint32_t A4XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMFPNONPOSVAR()  argument
1731 	return ((val) << A4XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) & A4XX_VPC_PACK_NUMFPNONPOSVAR__MASK;  in A4XX_VPC_PACK_NUMFPNONPOSVAR()
1735 static inline uint32_t A4XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMNONPOSVSVAR()  argument
1737 	return ((val) << A4XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) & A4XX_VPC_PACK_NUMNONPOSVSVAR__MASK;  in A4XX_VPC_PACK_NUMNONPOSVSVAR()
1753 static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A4XX_VSC_BIN_SIZE_WIDTH()  argument
1755 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A4XX_VSC_BIN_SIZE_WIDTH__MASK;  in A4XX_VSC_BIN_SIZE_WIDTH()
1759 static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A4XX_VSC_BIN_SIZE_HEIGHT()  argument
1761 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A4XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A4XX_VSC_BIN_SIZE_HEIGHT()
1775 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_X()  argument
1777 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_X()
1781 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_Y()  argument
1783 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_Y()
1787 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_W()  argument
1789 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_W()
1793 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_H()  argument
1795 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_H()
1823 static inline uint32_t A4XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()  argument
1825 	return ((val) << A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) & A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK;  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()
1829 static inline uint32_t A4XX_VFD_CONTROL_0_BYPASSATTROVS(uint32_t val)  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()  argument
1831 	return ((val) << A4XX_VFD_CONTROL_0_BYPASSATTROVS__SHIFT) & A4XX_VFD_CONTROL_0_BYPASSATTROVS__MASK;  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()
1835 static inline uint32_t A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()  argument
1837 …return ((val) << A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__…  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()
1841 static inline uint32_t A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()  argument
1843 …return ((val) << A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMFETCHINSTRC…  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
1849 static inline uint32_t A4XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)  in A4XX_VFD_CONTROL_1_MAXSTORAGE()  argument
1851 	return ((val) << A4XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) & A4XX_VFD_CONTROL_1_MAXSTORAGE__MASK;  in A4XX_VFD_CONTROL_1_MAXSTORAGE()
1855 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4VTX()  argument
1857 	return ((val) << A4XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A4XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A4XX_VFD_CONTROL_1_REGID4VTX()
1861 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4INST()  argument
1863 	return ((val) << A4XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A4XX_VFD_CONTROL_1_REGID4INST__MASK;  in A4XX_VFD_CONTROL_1_REGID4INST()
1871 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_VTXCNT(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()  argument
1873 	return ((val) << A4XX_VFD_CONTROL_3_REGID_VTXCNT__SHIFT) & A4XX_VFD_CONTROL_3_REGID_VTXCNT__MASK;  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()
1877 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSX()  argument
1879 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSX()
1883 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSY()  argument
1885 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSY()
1897 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()  argument
1899 	return ((val) << A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK;  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()
1903 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()  argument
1905 	return ((val) << A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK;  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
1915 static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_2_SIZE()  argument
1917 	return ((val >> 4) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;  in A4XX_VFD_FETCH_INSTR_2_SIZE()
1923 static inline uint32_t A4XX_VFD_FETCH_INSTR_3_STEPRATE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()  argument
1925 	return ((val) << A4XX_VFD_FETCH_INSTR_3_STEPRATE__SHIFT) & A4XX_VFD_FETCH_INSTR_3_STEPRATE__MASK;  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()
1933 static inline uint32_t A4XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)  in A4XX_VFD_DECODE_INSTR_WRITEMASK()  argument
1935 	return ((val) << A4XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) & A4XX_VFD_DECODE_INSTR_WRITEMASK__MASK;  in A4XX_VFD_DECODE_INSTR_WRITEMASK()
1940 static inline uint32_t A4XX_VFD_DECODE_INSTR_FORMAT(enum a4xx_vtx_fmt val)  in A4XX_VFD_DECODE_INSTR_FORMAT()  argument
1942 	return ((val) << A4XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A4XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A4XX_VFD_DECODE_INSTR_FORMAT()
1946 static inline uint32_t A4XX_VFD_DECODE_INSTR_REGID(uint32_t val)  in A4XX_VFD_DECODE_INSTR_REGID()  argument
1948 	return ((val) << A4XX_VFD_DECODE_INSTR_REGID__SHIFT) & A4XX_VFD_DECODE_INSTR_REGID__MASK;  in A4XX_VFD_DECODE_INSTR_REGID()
1953 static inline uint32_t A4XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A4XX_VFD_DECODE_INSTR_SWAP()  argument
1955 	return ((val) << A4XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A4XX_VFD_DECODE_INSTR_SWAP__MASK;  in A4XX_VFD_DECODE_INSTR_SWAP()
1959 static inline uint32_t A4XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()  argument
1961 	return ((val) << A4XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) & A4XX_VFD_DECODE_INSTR_SHIFTCNT__MASK;  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()
1977 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_VS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_VS()  argument
1979 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_VS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_VS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_VS()
1983 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_HS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_HS()  argument
1985 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_HS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_HS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_HS()
1989 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_DS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_DS()  argument
1991 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_DS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_DS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_DS()
1995 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_GS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_GS()  argument
1997 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_GS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_GS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_GS()
2034 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()  argument
2036 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
2040 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()  argument
2042 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()
2048 static inline uint32_t A4XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_XOFFSET_0()  argument
2050 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_XOFFSET_0()
2056 static inline uint32_t A4XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_XSCALE_0()  argument
2058 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_XSCALE_0()
2064 static inline uint32_t A4XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_YOFFSET_0()  argument
2066 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_YOFFSET_0()
2072 static inline uint32_t A4XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_YSCALE_0()  argument
2074 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_YSCALE_0()
2080 static inline uint32_t A4XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
2082 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()
2088 static inline uint32_t A4XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_ZSCALE_0()  argument
2090 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_ZSCALE_0()
2096 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MIN()  argument
2098 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MIN()
2102 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MAX()  argument
2104 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MAX()
2110 static inline uint32_t A4XX_GRAS_SU_POINT_SIZE(float val)  in A4XX_GRAS_SU_POINT_SIZE()  argument
2112 …return ((((int32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_SIZE__SHIFT) & A4XX_GRAS_SU_POINT_SIZE__MA…  in A4XX_GRAS_SU_POINT_SIZE()
2121 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
2123 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()
2129 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
2131 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()
2137 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_CLAMP(float val)  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()  argument
2139 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_CLAMP__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_CLAMP__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()
2145 static inline uint32_t A4XX_GRAS_DEPTH_CONTROL_FORMAT(enum a4xx_depth_format val)  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()  argument
2147 	return ((val) << A4XX_GRAS_DEPTH_CONTROL_FORMAT__SHIFT) & A4XX_GRAS_DEPTH_CONTROL_FORMAT__MASK;  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()
2156 static inline uint32_t A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()  argument
2158 …return ((((int32_t)(val * 4.0))) << A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A4XX_GRAS_SU…  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
2166 static inline uint32_t A4XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()  argument
2168 	return ((val) << A4XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RENDER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()
2172 static inline uint32_t A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(uint32_t val)  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()  argument
2174 …return ((val) << A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) & A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MA…  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
2179 static inline uint32_t A4XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()  argument
2181 	return ((val) << A4XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RASTER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()
2188 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()  argument
2190 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
2194 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()  argument
2196 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
2203 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()  argument
2205 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
2209 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()  argument
2211 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
2218 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
2220 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
2224 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
2226 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
2233 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
2235 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
2239 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
2241 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
2248 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()  argument
2250 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()
2254 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()  argument
2256 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()
2263 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()  argument
2265 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()
2269 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()  argument
2271 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()
2301 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
2303 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
2311 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()  argument
2313 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__MA…  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()
2323 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()  argument
2325 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_VSTHREADSI…  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
2331 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_COORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()  argument
2333 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_COORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_COORDREGID__…  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()
2337 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()  argument
2339 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREG…  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()
2345 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()  argument
2347 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_PRIM…  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
2351 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
2353 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()
2357 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()  argument
2359 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLEID…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()
2363 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()  argument
2365 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLE…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()
2371 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_REGID()  argument
2373 	return ((val) << A4XX_HLSQ_CONTROL_3_REG_REGID__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_REGID__MASK;  in A4XX_HLSQ_CONTROL_3_REG_REGID()
2381 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()  argument
2383 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
2387 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
2389 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CON…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()
2394 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()  argument
2396 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_SHADE…  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()
2400 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()  argument
2402 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
2408 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()  argument
2410 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
2414 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
2416 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CON…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()
2421 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()  argument
2423 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_SHADE…  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()
2427 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()  argument
2429 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
2435 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()  argument
2437 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()
2441 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
2443 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CON…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()
2448 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()  argument
2450 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_SHADE…  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()
2454 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()  argument
2456 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()
2462 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()  argument
2464 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()
2468 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
2470 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CON…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()
2475 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()  argument
2477 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_SHADE…  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()
2481 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()  argument
2483 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()
2489 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()  argument
2491 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()
2495 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
2497 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CON…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()
2502 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()  argument
2504 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_SHADE…  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()
2508 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()  argument
2510 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()
2559 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()  argument
2561 	return ((val) << A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) & A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()
2574 static inline uint32_t A4XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A4XX_PC_GS_PARAM_MAX_VERTICES()  argument
2576 	return ((val) << A4XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A4XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A4XX_PC_GS_PARAM_MAX_VERTICES()
2580 static inline uint32_t A4XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A4XX_PC_GS_PARAM_INVOCATIONS()  argument
2582 	return ((val) << A4XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A4XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A4XX_PC_GS_PARAM_INVOCATIONS()
2586 static inline uint32_t A4XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_GS_PARAM_PRIMTYPE()  argument
2588 	return ((val) << A4XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A4XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A4XX_PC_GS_PARAM_PRIMTYPE()
2595 static inline uint32_t A4XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A4XX_PC_HS_PARAM_VERTICES_OUT()  argument
2597 	return ((val) << A4XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A4XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A4XX_PC_HS_PARAM_VERTICES_OUT()
2601 static inline uint32_t A4XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A4XX_PC_HS_PARAM_SPACING()  argument
2603 	return ((val) << A4XX_PC_HS_PARAM_SPACING__SHIFT) & A4XX_PC_HS_PARAM_SPACING__MASK;  in A4XX_PC_HS_PARAM_SPACING()
2607 static inline uint32_t A4XX_PC_HS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_HS_PARAM_PRIMTYPE()  argument
2609 	return ((val) << A4XX_PC_HS_PARAM_PRIMTYPE__SHIFT) & A4XX_PC_HS_PARAM_PRIMTYPE__MASK;  in A4XX_PC_HS_PARAM_PRIMTYPE()
2658 static inline uint32_t A4XX_UNKNOWN_20F7(float val)  in A4XX_UNKNOWN_20F7()  argument
2660 	return ((fui(val)) << A4XX_UNKNOWN_20F7__SHIFT) & A4XX_UNKNOWN_20F7__MASK;  in A4XX_UNKNOWN_20F7()
2689 static inline uint32_t A4XX_TEX_SAMP_0_XY_MAG(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MAG()  argument
2691 	return ((val) << A4XX_TEX_SAMP_0_XY_MAG__SHIFT) & A4XX_TEX_SAMP_0_XY_MAG__MASK;  in A4XX_TEX_SAMP_0_XY_MAG()
2695 static inline uint32_t A4XX_TEX_SAMP_0_XY_MIN(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MIN()  argument
2697 	return ((val) << A4XX_TEX_SAMP_0_XY_MIN__SHIFT) & A4XX_TEX_SAMP_0_XY_MIN__MASK;  in A4XX_TEX_SAMP_0_XY_MIN()
2701 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_S(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_S()  argument
2703 	return ((val) << A4XX_TEX_SAMP_0_WRAP_S__SHIFT) & A4XX_TEX_SAMP_0_WRAP_S__MASK;  in A4XX_TEX_SAMP_0_WRAP_S()
2707 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_T(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_T()  argument
2709 	return ((val) << A4XX_TEX_SAMP_0_WRAP_T__SHIFT) & A4XX_TEX_SAMP_0_WRAP_T__MASK;  in A4XX_TEX_SAMP_0_WRAP_T()
2713 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_R()  argument
2715 	return ((val) << A4XX_TEX_SAMP_0_WRAP_R__SHIFT) & A4XX_TEX_SAMP_0_WRAP_R__MASK;  in A4XX_TEX_SAMP_0_WRAP_R()
2719 static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)  in A4XX_TEX_SAMP_0_ANISO()  argument
2721 	return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK;  in A4XX_TEX_SAMP_0_ANISO()
2727 static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A4XX_TEX_SAMP_1_COMPARE_FUNC()  argument
2729 	return ((val) << A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A4XX_TEX_SAMP_1_COMPARE_FUNC()
2735 static inline uint32_t A4XX_TEX_SAMP_1_MAX_LOD(float val)  in A4XX_TEX_SAMP_1_MAX_LOD()  argument
2737 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A4XX_TEX_SAMP_1_MAX_LOD__…  in A4XX_TEX_SAMP_1_MAX_LOD()
2741 static inline uint32_t A4XX_TEX_SAMP_1_MIN_LOD(float val)  in A4XX_TEX_SAMP_1_MIN_LOD()  argument
2743 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A4XX_TEX_SAMP_1_MIN_LOD__…  in A4XX_TEX_SAMP_1_MIN_LOD()
2751 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_X(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_X()  argument
2753 	return ((val) << A4XX_TEX_CONST_0_SWIZ_X__SHIFT) & A4XX_TEX_CONST_0_SWIZ_X__MASK;  in A4XX_TEX_CONST_0_SWIZ_X()
2757 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Y(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Y()  argument
2759 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Y__MASK;  in A4XX_TEX_CONST_0_SWIZ_Y()
2763 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Z(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Z()  argument
2765 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Z__MASK;  in A4XX_TEX_CONST_0_SWIZ_Z()
2769 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_W(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_W()  argument
2771 	return ((val) << A4XX_TEX_CONST_0_SWIZ_W__SHIFT) & A4XX_TEX_CONST_0_SWIZ_W__MASK;  in A4XX_TEX_CONST_0_SWIZ_W()
2775 static inline uint32_t A4XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A4XX_TEX_CONST_0_MIPLVLS()  argument
2777 	return ((val) << A4XX_TEX_CONST_0_MIPLVLS__SHIFT) & A4XX_TEX_CONST_0_MIPLVLS__MASK;  in A4XX_TEX_CONST_0_MIPLVLS()
2781 static inline uint32_t A4XX_TEX_CONST_0_FMT(enum a4xx_tex_fmt val)  in A4XX_TEX_CONST_0_FMT()  argument
2783 	return ((val) << A4XX_TEX_CONST_0_FMT__SHIFT) & A4XX_TEX_CONST_0_FMT__MASK;  in A4XX_TEX_CONST_0_FMT()
2787 static inline uint32_t A4XX_TEX_CONST_0_TYPE(enum a4xx_tex_type val)  in A4XX_TEX_CONST_0_TYPE()  argument
2789 	return ((val) << A4XX_TEX_CONST_0_TYPE__SHIFT) & A4XX_TEX_CONST_0_TYPE__MASK;  in A4XX_TEX_CONST_0_TYPE()
2795 static inline uint32_t A4XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A4XX_TEX_CONST_1_HEIGHT()  argument
2797 	return ((val) << A4XX_TEX_CONST_1_HEIGHT__SHIFT) & A4XX_TEX_CONST_1_HEIGHT__MASK;  in A4XX_TEX_CONST_1_HEIGHT()
2801 static inline uint32_t A4XX_TEX_CONST_1_WIDTH(uint32_t val)  in A4XX_TEX_CONST_1_WIDTH()  argument
2803 	return ((val) << A4XX_TEX_CONST_1_WIDTH__SHIFT) & A4XX_TEX_CONST_1_WIDTH__MASK;  in A4XX_TEX_CONST_1_WIDTH()
2809 static inline uint32_t A4XX_TEX_CONST_2_FETCHSIZE(enum a4xx_tex_fetchsize val)  in A4XX_TEX_CONST_2_FETCHSIZE()  argument
2811 	return ((val) << A4XX_TEX_CONST_2_FETCHSIZE__SHIFT) & A4XX_TEX_CONST_2_FETCHSIZE__MASK;  in A4XX_TEX_CONST_2_FETCHSIZE()
2815 static inline uint32_t A4XX_TEX_CONST_2_PITCH(uint32_t val)  in A4XX_TEX_CONST_2_PITCH()  argument
2817 	return ((val) << A4XX_TEX_CONST_2_PITCH__SHIFT) & A4XX_TEX_CONST_2_PITCH__MASK;  in A4XX_TEX_CONST_2_PITCH()
2821 static inline uint32_t A4XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)  in A4XX_TEX_CONST_2_SWAP()  argument
2823 	return ((val) << A4XX_TEX_CONST_2_SWAP__SHIFT) & A4XX_TEX_CONST_2_SWAP__MASK;  in A4XX_TEX_CONST_2_SWAP()
2829 static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_3_LAYERSZ()  argument
2831 	return ((val >> 12) << A4XX_TEX_CONST_3_LAYERSZ__SHIFT) & A4XX_TEX_CONST_3_LAYERSZ__MASK;  in A4XX_TEX_CONST_3_LAYERSZ()
2835 static inline uint32_t A4XX_TEX_CONST_3_DEPTH(uint32_t val)  in A4XX_TEX_CONST_3_DEPTH()  argument
2837 	return ((val) << A4XX_TEX_CONST_3_DEPTH__SHIFT) & A4XX_TEX_CONST_3_DEPTH__MASK;  in A4XX_TEX_CONST_3_DEPTH()
2843 static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_4_LAYERSZ()  argument
2845 	return ((val >> 12) << A4XX_TEX_CONST_4_LAYERSZ__SHIFT) & A4XX_TEX_CONST_4_LAYERSZ__MASK;  in A4XX_TEX_CONST_4_LAYERSZ()
2849 static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val)  in A4XX_TEX_CONST_4_BASE()  argument
2851 	return ((val >> 5) << A4XX_TEX_CONST_4_BASE__SHIFT) & A4XX_TEX_CONST_4_BASE__MASK;  in A4XX_TEX_CONST_4_BASE()