Lines Matching refs:i1
270 …2_t REG_MDP5_MDP_SMP_ALLOC_W(uint32_t i0, uint32_t i1) { return 0x00000080 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_W() argument
272 …REG_MDP5_MDP_SMP_ALLOC_W_REG(uint32_t i0, uint32_t i1) { return 0x00000080 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_W_REG() argument
292 …2_t REG_MDP5_MDP_SMP_ALLOC_R(uint32_t i0, uint32_t i1) { return 0x00000130 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_R() argument
294 …REG_MDP5_MDP_SMP_ALLOC_R_REG(uint32_t i0, uint32_t i1) { return 0x00000130 + __offset_MDP(i0) + 0x… in REG_MDP5_MDP_SMP_ALLOC_R_REG() argument
324 …_MDP5_MDP_IGC(uint32_t i0, enum mdp5_igc_type i1) { return 0x00000000 + __offset_MDP(i0) + __offse… in REG_MDP5_MDP_IGC() argument
326 …IGC_LUT(uint32_t i0, enum mdp5_igc_type i1, uint32_t i2) { return 0x00000000 + __offset_MDP(i0) + … in REG_MDP5_MDP_IGC_LUT() argument
328 …LUT_REG(uint32_t i0, enum mdp5_igc_type i1, uint32_t i2) { return 0x00000000 + __offset_MDP(i0) + … in REG_MDP5_MDP_IGC_LUT_REG() argument
379 …2_t REG_MDP5_CTL_LAYER(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset… in REG_MDP5_CTL_LAYER() argument
381 …REG_MDP5_CTL_LAYER_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset… in REG_MDP5_CTL_LAYER_REG() argument
514 …G_MDP5_CTL_LAYER_EXT(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset_L… in REG_MDP5_CTL_LAYER_EXT() argument
516 …P5_CTL_LAYER_EXT_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_CTL(i0) + __offset_L… in REG_MDP5_CTL_LAYER_EXT_REG() argument
643 …_PIPE_CSC_1_PRE_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP() argument
645 …E_CSC_1_PRE_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000334 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP_REG() argument
659 …PIPE_CSC_1_POST_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_CLAMP() argument
661 …_CSC_1_POST_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000340 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_CLAMP_REG() argument
675 …5_PIPE_CSC_1_PRE_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_BIAS() argument
677 …PE_CSC_1_PRE_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x0000034c + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_PRE_BIAS_REG() argument
685 …_PIPE_CSC_1_POST_BIAS(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_BIAS() argument
687 …E_CSC_1_POST_BIAS_REG(enum mdp5_pipe i0, uint32_t i1) { return 0x00000358 + __offset_PIPE(i0) + 0x… in REG_MDP5_PIPE_CSC_1_POST_BIAS_REG() argument
945 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000000 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT() argument
947 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000000 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT_LR() argument
973 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000004 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT_TB() argument
999 …num mdp5_pipe i0, enum mdp_component_type i1) { return 0x00000008 + __offset_PIPE(i0) + __offset_S… in REG_MDP5_PIPE_SW_PIX_EXT_REQ_PIXELS() argument
1116 …t32_t REG_MDP5_LM_BLEND(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND() argument
1118 …G_MDP5_LM_BLEND_OP_MODE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_OP_MODE() argument
1140 …_MDP5_LM_BLEND_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_ALPHA() argument
1142 …_MDP5_LM_BLEND_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_ALPHA() argument
1144 …LM_BLEND_FG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000c + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_LOW0() argument
1146 …LM_BLEND_FG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000010 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_LOW1() argument
1148 …M_BLEND_FG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000014 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0() argument
1150 …M_BLEND_FG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000018 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1() argument
1152 …LM_BLEND_BG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000001c + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_LOW0() argument
1154 …LM_BLEND_BG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000020 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_LOW1() argument
1156 …M_BLEND_BG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000024 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_HIGH0() argument
1158 …M_BLEND_BG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000028 + __offset_LM(i0) + __offset… in REG_MDP5_LM_BLEND_BG_TRANSP_HIGH1() argument
1689 …EG_MDP5_WB_CSC_COMP_PRECLAMP(uint32_t i0, uint32_t i1) { return 0x00000274 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PRECLAMP() argument
1691 …DP5_WB_CSC_COMP_PRECLAMP_REG(uint32_t i0, uint32_t i1) { return 0x00000274 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PRECLAMP_REG() argument
1705 …G_MDP5_WB_CSC_COMP_POSTCLAMP(uint32_t i0, uint32_t i1) { return 0x00000280 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTCLAMP() argument
1707 …P5_WB_CSC_COMP_POSTCLAMP_REG(uint32_t i0, uint32_t i1) { return 0x00000280 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTCLAMP_REG() argument
1721 …REG_MDP5_WB_CSC_COMP_PREBIAS(uint32_t i0, uint32_t i1) { return 0x0000028c + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PREBIAS() argument
1723 …MDP5_WB_CSC_COMP_PREBIAS_REG(uint32_t i0, uint32_t i1) { return 0x0000028c + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_PREBIAS_REG() argument
1731 …EG_MDP5_WB_CSC_COMP_POSTBIAS(uint32_t i0, uint32_t i1) { return 0x00000298 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTBIAS() argument
1733 …DP5_WB_CSC_COMP_POSTBIAS_REG(uint32_t i0, uint32_t i1) { return 0x00000298 + __offset_WB(i0) + 0x4… in REG_MDP5_WB_CSC_COMP_POSTBIAS_REG() argument