Lines Matching refs:disp
34 gf119_disp_vblank_init(struct nv50_disp *disp, int head) in gf119_disp_vblank_init() argument
36 struct nvkm_device *device = disp->base.engine.subdev.device; in gf119_disp_vblank_init()
41 gf119_disp_vblank_fini(struct nv50_disp *disp, int head) in gf119_disp_vblank_fini() argument
43 struct nvkm_device *device = disp->base.engine.subdev.device; in gf119_disp_vblank_fini()
48 exec_lookup(struct nv50_disp *disp, int head, int or, u32 ctrl, in exec_lookup() argument
52 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in exec_lookup()
79 list_for_each_entry(outp, &disp->base.outp, head) { in exec_lookup()
95 exec_script(struct nv50_disp *disp, int head, int id) in exec_script() argument
97 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in exec_script()
115 outp = exec_lookup(disp, head, or, ctrl, &data, &ver, &hdr, &cnt, &len, &info); in exec_script()
133 exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf) in exec_clkcmp() argument
135 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in exec_clkcmp()
154 outp = exec_lookup(disp, head, or, ctrl, &data, &ver, &hdr, &cnt, &len, &info1); in exec_clkcmp()
165 *conf = disp->sor.lvdsconf; in exec_clkcmp()
197 gf119_disp_intr_unk1_0(struct nv50_disp *disp, int head) in gf119_disp_intr_unk1_0() argument
199 exec_script(disp, head, 1); in gf119_disp_intr_unk1_0()
203 gf119_disp_intr_unk2_0(struct nv50_disp *disp, int head) in gf119_disp_intr_unk2_0() argument
205 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in gf119_disp_intr_unk2_0()
206 struct nvkm_output *outp = exec_script(disp, head, 2); in gf119_disp_intr_unk2_0()
226 gf119_disp_intr_unk2_1(struct nv50_disp *disp, int head) in gf119_disp_intr_unk2_1() argument
228 struct nvkm_device *device = disp->base.engine.subdev.device; in gf119_disp_intr_unk2_1()
237 gf119_disp_intr_unk2_2_tu(struct nv50_disp *disp, int head, in gf119_disp_intr_unk2_2_tu() argument
240 struct nvkm_device *device = disp->base.engine.subdev.device; in gf119_disp_intr_unk2_2_tu()
299 gf119_disp_intr_unk2_2(struct nv50_disp *disp, int head) in gf119_disp_intr_unk2_2() argument
301 struct nvkm_device *device = disp->base.engine.subdev.device; in gf119_disp_intr_unk2_2()
306 outp = exec_clkcmp(disp, head, 0xff, pclk, &conf); in gf119_disp_intr_unk2_2()
325 if (disp->func->sor.magic) in gf119_disp_intr_unk2_2()
326 disp->func->sor.magic(outp); in gf119_disp_intr_unk2_2()
329 exec_clkcmp(disp, head, 0, pclk, &conf); in gf119_disp_intr_unk2_2()
342 gf119_disp_intr_unk2_2_tu(disp, head, &outp->info); in gf119_disp_intr_unk2_2()
353 gf119_disp_intr_unk4_0(struct nv50_disp *disp, int head) in gf119_disp_intr_unk4_0() argument
355 struct nvkm_device *device = disp->base.engine.subdev.device; in gf119_disp_intr_unk4_0()
359 exec_clkcmp(disp, head, 1, pclk, &conf); in gf119_disp_intr_unk4_0()
365 struct nv50_disp *disp = in gf119_disp_intr_supervisor() local
367 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in gf119_disp_intr_supervisor()
372 nvkm_debug(subdev, "supervisor %d\n", ffs(disp->super)); in gf119_disp_intr_supervisor()
373 for (head = 0; head < disp->base.head.nr; head++) { in gf119_disp_intr_supervisor()
378 if (disp->super & 0x00000001) { in gf119_disp_intr_supervisor()
379 nv50_disp_chan_mthd(disp->chan[0], NV_DBG_DEBUG); in gf119_disp_intr_supervisor()
380 for (head = 0; head < disp->base.head.nr; head++) { in gf119_disp_intr_supervisor()
384 gf119_disp_intr_unk1_0(disp, head); in gf119_disp_intr_supervisor()
387 if (disp->super & 0x00000002) { in gf119_disp_intr_supervisor()
388 for (head = 0; head < disp->base.head.nr; head++) { in gf119_disp_intr_supervisor()
392 gf119_disp_intr_unk2_0(disp, head); in gf119_disp_intr_supervisor()
394 for (head = 0; head < disp->base.head.nr; head++) { in gf119_disp_intr_supervisor()
398 gf119_disp_intr_unk2_1(disp, head); in gf119_disp_intr_supervisor()
400 for (head = 0; head < disp->base.head.nr; head++) { in gf119_disp_intr_supervisor()
404 gf119_disp_intr_unk2_2(disp, head); in gf119_disp_intr_supervisor()
407 if (disp->super & 0x00000004) { in gf119_disp_intr_supervisor()
408 for (head = 0; head < disp->base.head.nr; head++) { in gf119_disp_intr_supervisor()
412 gf119_disp_intr_unk4_0(disp, head); in gf119_disp_intr_supervisor()
416 for (head = 0; head < disp->base.head.nr; head++) in gf119_disp_intr_supervisor()
422 gf119_disp_intr_error(struct nv50_disp *disp, int chid) in gf119_disp_intr_error() argument
424 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in gf119_disp_intr_error()
433 if (chid < ARRAY_SIZE(disp->chan)) { in gf119_disp_intr_error()
436 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR); in gf119_disp_intr_error()
448 gf119_disp_intr(struct nv50_disp *disp) in gf119_disp_intr() argument
450 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in gf119_disp_intr()
459 nv50_disp_chan_uevent_send(disp, chid); in gf119_disp_intr()
469 gf119_disp_intr_error(disp, chid); in gf119_disp_intr()
476 disp->super = (stat & 0x00000007); in gf119_disp_intr()
477 schedule_work(&disp->supervisor); in gf119_disp_intr()
478 nvkm_wr32(device, 0x6100ac, disp->super); in gf119_disp_intr()
490 for (i = 0; i < disp->base.head.nr; i++) { in gf119_disp_intr()
495 nvkm_disp_vblank(&disp->base, i); in gf119_disp_intr()