125 read_clk(struct gf100_clk *clk, int idx)  in read_clk()  argument
128 	u32 sctl = nvkm_rd32(device, 0x137250 + (idx * 4));  in read_clk()
132 	if (ssel & (1 << idx)) {  in read_clk()
133 		if (idx < 7)  in read_clk()
134 			sclk = read_pll(clk, 0x137000 + (idx * 0x20));  in read_clk()
139 		sclk = read_div(clk, idx, 0x137160, 0x1371d0);  in read_clk()
202 calc_div(struct gf100_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv)  in calc_div()  argument
213 calc_src(struct gf100_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv)  in calc_src()  argument
235 	sclk = read_vco(clk, 0x137160 + (idx * 4));  in calc_src()
236 	if (idx < 7)  in calc_src()
237 		sclk = calc_div(clk, idx, sclk, freq, ddiv);  in calc_src()
242 calc_pll(struct gf100_clk *clk, int idx, u32 freq, u32 *coef)  in calc_pll()  argument
249 	ret = nvbios_pll_parse(bios, 0x137000 + (idx * 0x20), &limits);  in calc_pll()
253 	limits.refclk = read_div(clk, idx, 0x137120, 0x137140);  in calc_pll()
266 calc_clk(struct gf100_clk *clk, struct nvkm_cstate *cstate, int idx, int dom)  in calc_clk()  argument
268 	struct gf100_clk_info *info = &clk->eng[idx];  in calc_clk()
278 	clk0 = calc_src(clk, idx, freq, &src0, &div0);  in calc_clk()
279 	clk0 = calc_div(clk, idx, clk0, freq, &div1D);  in calc_clk()
282 	if (clk0 != freq && (0x00004387 & (1 << idx))) {  in calc_clk()
283 		if (idx <= 7)  in calc_clk()
284 			clk1 = calc_pll(clk, idx, freq, &info->coef);  in calc_clk()
287 		clk1 = calc_div(clk, idx, clk1, freq, &div1P);  in calc_clk()
309 		info->ssel = (1 << idx);  in calc_clk()
336 gf100_clk_prog_0(struct gf100_clk *clk, int idx)  in gf100_clk_prog_0()  argument
338 	struct gf100_clk_info *info = &clk->eng[idx];  in gf100_clk_prog_0()
340 	if (idx < 7 && !info->ssel) {  in gf100_clk_prog_0()
341 		nvkm_mask(device, 0x1371d0 + (idx * 0x04), 0x80003f3f, info->ddiv);  in gf100_clk_prog_0()
342 		nvkm_wr32(device, 0x137160 + (idx * 0x04), info->dsrc);  in gf100_clk_prog_0()
347 gf100_clk_prog_1(struct gf100_clk *clk, int idx)  in gf100_clk_prog_1()  argument
350 	nvkm_mask(device, 0x137100, (1 << idx), 0x00000000);  in gf100_clk_prog_1()
352 		if (!(nvkm_rd32(device, 0x137100) & (1 << idx)))  in gf100_clk_prog_1()
358 gf100_clk_prog_2(struct gf100_clk *clk, int idx)  in gf100_clk_prog_2()  argument
360 	struct gf100_clk_info *info = &clk->eng[idx];  in gf100_clk_prog_2()
362 	const u32 addr = 0x137000 + (idx * 0x20);  in gf100_clk_prog_2()
363 	if (idx <= 7) {  in gf100_clk_prog_2()
379 gf100_clk_prog_3(struct gf100_clk *clk, int idx)  in gf100_clk_prog_3()  argument
381 	struct gf100_clk_info *info = &clk->eng[idx];  in gf100_clk_prog_3()
384 		nvkm_mask(device, 0x137100, (1 << idx), info->ssel);  in gf100_clk_prog_3()
386 			u32 tmp = nvkm_rd32(device, 0x137100) & (1 << idx);  in gf100_clk_prog_3()
394 gf100_clk_prog_4(struct gf100_clk *clk, int idx)  in gf100_clk_prog_4()  argument
396 	struct gf100_clk_info *info = &clk->eng[idx];  in gf100_clk_prog_4()
398 	nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f3f, info->mdiv);  in gf100_clk_prog_4()