108 read_pll(struct gt215_clk *clk, int idx, u32 pll)  in read_pll()  argument
111 	u32 ctrl = nvkm_rd32(device, pll + 0);  in read_pll()
116 			u32 coef = nvkm_rd32(device, pll + 4);  in read_pll()
124 			if ((pll & 0x00ff00) == 0x00e800)  in read_pll()
232 gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz,  in gt215_pll_info()  argument
241 	info->pll = 0;  in gt215_pll_info()
247 	if (!pll || (diff >= -2000 && diff < 3000)) {  in gt215_pll_info()
252 	ret = nvbios_pll_parse(subdev->device->bios, pll, &limits);  in gt215_pll_info()
262 		info->pll = (P << 16) | (N << 8) | M;  in gt215_pll_info()
272 	 int idx, u32 pll, int dom)  in calc_clk()  argument
274 	int ret = gt215_pll_info(&clk->base, idx, pll, cstate->domain[dom],  in calc_clk()
360 prog_pll(struct gt215_clk *clk, int idx, u32 pll, int dom)  in prog_pll()  argument
366 	const u32 ctrl = pll + 0;  in prog_pll()
367 	const u32 coef = pll + 4;  in prog_pll()
370 	if (info->pll) {  in prog_pll()
380 		nvkm_wr32(device, coef, info->pll);  in prog_pll()
471 	if (core->pll) {  in gt215_clk_calc()
495 	if (core->pll)  in gt215_clk_prog()