1781 	u32 idx_value;  in evergreen_packet3_check()  local
1786 	idx_value = radeon_get_ib_value(p, idx);  in evergreen_packet3_check()
1819 		         (idx_value & 0xfffffff0) +  in evergreen_packet3_check()
1865 		         idx_value +  in evergreen_packet3_check()
1900 		         idx_value +  in evergreen_packet3_check()
2011 		if (idx_value != 1) {  in evergreen_packet3_check()
2044 		if (idx_value + size > track->indirect_draw_buffer_size) {  in evergreen_packet3_check()
2046 				idx_value, size, track->indirect_draw_buffer_size);  in evergreen_packet3_check()
2078 		ib[idx+0] = idx_value + (u32)(reloc->gpu_offset & 0xffffffff);  in evergreen_packet3_check()
2091 		if (idx_value & 0x10) {  in evergreen_packet3_check()
2106 		} else if (idx_value & 0x100) {  in evergreen_packet3_check()
2294 		start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;  in evergreen_packet3_check()
2311 		start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START;  in evergreen_packet3_check()
2332 		start_reg = (idx_value << 2) + PACKET3_SET_RESOURCE_START;  in evergreen_packet3_check()
2435 		start_reg = (idx_value << 2) + PACKET3_SET_BOOL_CONST_START;  in evergreen_packet3_check()
2445 		start_reg = (idx_value << 2) + PACKET3_SET_LOOP_CONST_START;  in evergreen_packet3_check()
2455 		start_reg = (idx_value << 2) + PACKET3_SET_CTL_CONST_START;  in evergreen_packet3_check()
2469 		start_reg = (idx_value << 2) + PACKET3_SET_SAMPLER_START;  in evergreen_packet3_check()
2484 		if (idx_value & 0x1) {  in evergreen_packet3_check()
2503 		if (((idx_value >> 1) & 0x3) == 2) {  in evergreen_packet3_check()
2556 		if (idx_value & 0x1) {  in evergreen_packet3_check()
2583 		if (idx_value & 0x2) {  in evergreen_packet3_check()
3300 	u32 idx_value = ib[idx];  in evergreen_vm_packet3_check()  local
3308 		if (idx_value != 1) {  in evergreen_vm_packet3_check()
3355 		if (idx_value & 0x100) {  in evergreen_vm_packet3_check()
3362 		if (idx_value & 0x2) {  in evergreen_vm_packet3_check()
3369 		start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;  in evergreen_vm_packet3_check()
3401 				start_reg = idx_value << 2;  in evergreen_vm_packet3_check()