Lines Matching refs:WREG32_P
203 WREG32_P(CG_UPLL_FUNC_CNTL_2, in r600_set_uvd_clocks()
208 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~( in r600_set_uvd_clocks()
212 WREG32_P(GFX_MACRO_BYPASS_CNTL, UPLL_BYPASS_CNTL, in r600_set_uvd_clocks()
217 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK); in r600_set_uvd_clocks()
242 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_RESET_MASK, ~UPLL_RESET_MASK); in r600_set_uvd_clocks()
246 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_REFCLK_SRC_SEL_MASK, in r600_set_uvd_clocks()
250 WREG32_P(CG_UPLL_FUNC_CNTL, in r600_set_uvd_clocks()
254 WREG32_P(CG_UPLL_FUNC_CNTL_2, in r600_set_uvd_clocks()
266 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in r600_set_uvd_clocks()
271 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in r600_set_uvd_clocks()
274 WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~UPLL_BYPASS_CNTL); in r600_set_uvd_clocks()
281 WREG32_P(CG_UPLL_FUNC_CNTL_2, in r600_set_uvd_clocks()