Lines Matching refs:uint32_t
158 uint32_t *image;
166 uint32_t flags;
167 uint32_t format;
168 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
171 uint32_t num_sizes;
173 uint32_t array_size;
178 uint32_t multisample_count;
195 uint32_t capabilities;
205 uint32_t index;
222 uint32_t handle;
297 uint32_t cur_reloc;
299 uint32_t cur_val_buf;
300 uint32_t *cmd_bounce;
301 uint32_t cmd_bounce_size;
306 uint32_t *buf_start;
328 uint32_t width;
329 uint32_t height;
330 uint32_t primary;
331 uint32_t pos_x;
332 uint32_t pos_y;
365 uint32_t vram_start;
366 uint32_t vram_size;
367 uint32_t prim_bb_mem;
368 uint32_t mmio_start;
369 uint32_t mmio_size;
370 uint32_t fb_max_width;
371 uint32_t fb_max_height;
372 uint32_t texture_max_width;
373 uint32_t texture_max_height;
374 uint32_t stdu_max_width;
375 uint32_t stdu_max_height;
376 uint32_t initial_width;
377 uint32_t initial_height;
379 uint32_t capabilities;
380 uint32_t max_gmr_ids;
381 uint32_t max_gmr_pages;
382 uint32_t max_mob_pages;
383 uint32_t max_mob_size;
384 uint32_t memory_size;
396 uint32_t vga_width;
397 uint32_t vga_height;
398 uint32_t vga_bpp;
399 uint32_t vga_bpl;
400 uint32_t vga_pitchlock;
402 uint32_t num_displays;
446 uint32_t last_read_seqno;
448 uint32_t irq_mask; /* Updates protected by waiter_lock */
454 uint32_t traces_state;
455 uint32_t enable_state;
456 uint32_t config_done_state;
502 uint32_t query_cid;
503 uint32_t query_cid_valid;
514 uint32_t used_memory_size;
557 unsigned int offset, uint32_t value) in vmw_write()
567 static inline uint32_t vmw_read(struct vmw_private *dev_priv, in vmw_read()
610 uint32_t handle,
616 uint32_t handle,
629 uint32_t size,
631 uint32_t *handle,
636 uint32_t *handle);
643 extern uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
644 uint32_t cur_validate_node);
647 uint32_t id, struct vmw_dma_buffer **out,
655 uint32_t *inout_id,
718 extern void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes);
720 vmw_fifo_reserve_dx(struct vmw_private *dev_priv, uint32_t bytes, int ctx_id);
721 extern void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes);
722 extern void vmw_fifo_commit_flush(struct vmw_private *dev_priv, uint32_t bytes);
724 uint32_t *seqno);
725 extern void vmw_fifo_ping_host_locked(struct vmw_private *, uint32_t reason);
726 extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason);
730 uint32_t cid);
814 uint32_t command_size,
816 uint32_t dx_context_handle,
827 uint32_t *p_handle);
834 uint32_t fence_handle);
847 uint32_t seqno, bool interruptible,
853 uint32_t seqno);
857 uint32_t seqno,
879 uint32_t seqno);
881 uint32_t signaled_seqno);
883 struct vmw_marker_queue *queue, uint32_t us);
914 uint32_t pitch,
915 uint32_t height);
923 uint32_t sid, int32_t destX, int32_t destY,
925 uint32_t num_clips);
935 struct drm_device *dev, uint32_t handle,
939 uint32_t handle);
955 int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out);
956 int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id);
976 uint32_t handle, uint32_t flags,
1045 uint32_t handle, int *id);
1049 uint32_t user_accounting_size,
1050 uint32_t svga3d_flags,
1053 uint32_t num_mip_levels,
1054 uint32_t multisample_count,
1055 uint32_t array_size,