69 #define MAX_AGAW_PFN_WIDTH	(MAX_AGAW_WIDTH - VTD_PAGE_SHIFT)
71 #define __DOMAIN_MAX_PFN(gaw)  ((((uint64_t)1) << (gaw-VTD_PAGE_SHIFT)) - 1)
78 #define DOMAIN_MAX_ADDR(gaw)	(((uint64_t)__DOMAIN_MAX_PFN(gaw)) << VTD_PAGE_SHIFT)
158 	return dma_pfn >> (PAGE_SHIFT - VTD_PAGE_SHIFT);  in dma_to_mm_pfn()
163 	return mm_pfn << (PAGE_SHIFT - VTD_PAGE_SHIFT);  in mm_to_dma_pfn()
700 	int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;  in domain_pfn_supported()
1028 			pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE;  in pfn_to_dma_pte()
1482 	if (info->ats_supported && !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) {  in iommu_enable_dev_iotlb()
1538 	uint64_t addr = (uint64_t)pfn << VTD_PAGE_SHIFT;  in iommu_flush_iotlb_psi()
2102 	return PAGE_ALIGN(host_addr + size) >> VTD_PAGE_SHIFT;  in aligned_nrpages()
2152 		pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | prot;  in __domain_mapping()
2160 			sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + sg->offset;  in __domain_mapping()
2163 			phys_pfn = pteval >> VTD_PAGE_SHIFT;  in __domain_mapping()
2489 	unsigned long first_vpfn = start >> VTD_PAGE_SHIFT;  in iommu_domain_identity_map()
2490 	unsigned long last_vpfn = end >> VTD_PAGE_SHIFT;  in iommu_domain_identity_map()
4887 	ret = domain_pfn_mapping(dmar_domain, iova >> VTD_PAGE_SHIFT,  in intel_iommu_map()
4888 				 hpa >> VTD_PAGE_SHIFT, size, prot);  in intel_iommu_map()
4904 	BUG_ON(!pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level));  in intel_iommu_unmap()
4909 	start_pfn = iova >> VTD_PAGE_SHIFT;  in intel_iommu_unmap()
4910 	last_pfn = (iova + size - 1) >> VTD_PAGE_SHIFT;  in intel_iommu_unmap()
4939 	pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level);  in intel_iommu_iova_to_phys()