199 static u32 ipmmu_ctx_read(struct ipmmu_vmsa_domain *domain, unsigned int reg)  in ipmmu_ctx_read()  argument
201 	return ipmmu_read(domain->mmu, domain->context_id * IM_CTX_SIZE + reg);  in ipmmu_ctx_read()
204 static void ipmmu_ctx_write(struct ipmmu_vmsa_domain *domain, unsigned int reg,  in ipmmu_ctx_write()  argument
207 	ipmmu_write(domain->mmu, domain->context_id * IM_CTX_SIZE + reg, data);  in ipmmu_ctx_write()
215 static void ipmmu_tlb_sync(struct ipmmu_vmsa_domain *domain)  in ipmmu_tlb_sync()  argument
219 	while (ipmmu_ctx_read(domain, IMCTR) & IMCTR_FLUSH) {  in ipmmu_tlb_sync()
222 			dev_err_ratelimited(domain->mmu->dev,  in ipmmu_tlb_sync()
230 static void ipmmu_tlb_invalidate(struct ipmmu_vmsa_domain *domain)  in ipmmu_tlb_invalidate()  argument
234 	reg = ipmmu_ctx_read(domain, IMCTR);  in ipmmu_tlb_invalidate()
236 	ipmmu_ctx_write(domain, IMCTR, reg);  in ipmmu_tlb_invalidate()
238 	ipmmu_tlb_sync(domain);  in ipmmu_tlb_invalidate()
244 static void ipmmu_utlb_enable(struct ipmmu_vmsa_domain *domain,  in ipmmu_utlb_enable()  argument
247 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_utlb_enable()
258 		    IMUCTR_TTSEL_MMU(domain->context_id) | IMUCTR_FLUSH |  in ipmmu_utlb_enable()
265 static void ipmmu_utlb_disable(struct ipmmu_vmsa_domain *domain,  in ipmmu_utlb_disable()  argument
268 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_utlb_disable()
275 	struct ipmmu_vmsa_domain *domain = cookie;  in ipmmu_tlb_flush_all()  local
277 	ipmmu_tlb_invalidate(domain);  in ipmmu_tlb_flush_all()
296 static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_init_context()  argument
311 	domain->cfg.quirks = IO_PGTABLE_QUIRK_ARM_NS;  in ipmmu_domain_init_context()
312 	domain->cfg.pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,  in ipmmu_domain_init_context()
313 	domain->cfg.ias = 32;  in ipmmu_domain_init_context()
314 	domain->cfg.oas = 40;  in ipmmu_domain_init_context()
315 	domain->cfg.tlb = &ipmmu_gather_ops;  in ipmmu_domain_init_context()
320 	domain->cfg.iommu_dev = domain->mmu->dev;  in ipmmu_domain_init_context()
322 	domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg,  in ipmmu_domain_init_context()
323 					   domain);  in ipmmu_domain_init_context()
324 	if (!domain->iop)  in ipmmu_domain_init_context()
331 	domain->context_id = 0;  in ipmmu_domain_init_context()
334 	ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr[0];  in ipmmu_domain_init_context()
335 	ipmmu_ctx_write(domain, IMTTLBR0, ttbr);  in ipmmu_domain_init_context()
336 	ipmmu_ctx_write(domain, IMTTUBR0, ttbr >> 32);  in ipmmu_domain_init_context()
343 	ipmmu_ctx_write(domain, IMTTBCR, IMTTBCR_EAE |  in ipmmu_domain_init_context()
348 	ipmmu_ctx_write(domain, IMMAIR0, domain->cfg.arm_lpae_s1_cfg.mair[0]);  in ipmmu_domain_init_context()
351 	ipmmu_ctx_write(domain, IMBUSCR,  in ipmmu_domain_init_context()
352 			ipmmu_ctx_read(domain, IMBUSCR) &  in ipmmu_domain_init_context()
359 	ipmmu_ctx_write(domain, IMSTR, ipmmu_ctx_read(domain, IMSTR));  in ipmmu_domain_init_context()
368 	ipmmu_ctx_write(domain, IMCTR, IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN);  in ipmmu_domain_init_context()
373 static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_destroy_context()  argument
381 	ipmmu_ctx_write(domain, IMCTR, IMCTR_FLUSH);  in ipmmu_domain_destroy_context()
382 	ipmmu_tlb_sync(domain);  in ipmmu_domain_destroy_context()
389 static irqreturn_t ipmmu_domain_irq(struct ipmmu_vmsa_domain *domain)  in ipmmu_domain_irq()  argument
392 	struct ipmmu_vmsa_device *mmu = domain->mmu;  in ipmmu_domain_irq()
396 	status = ipmmu_ctx_read(domain, IMSTR);  in ipmmu_domain_irq()
400 	iova = ipmmu_ctx_read(domain, IMEAR);  in ipmmu_domain_irq()
408 	ipmmu_ctx_write(domain, IMSTR, 0);  in ipmmu_domain_irq()
427 	if (!report_iommu_fault(&domain->io_domain, mmu->dev, iova, 0))  in ipmmu_domain_irq()
441 	struct ipmmu_vmsa_domain *domain;  in ipmmu_irq()  local
446 	io_domain = mmu->mapping->domain;  in ipmmu_irq()
447 	domain = to_vmsa_domain(io_domain);  in ipmmu_irq()
449 	return ipmmu_domain_irq(domain);  in ipmmu_irq()
458 	struct ipmmu_vmsa_domain *domain;  in ipmmu_domain_alloc()  local
463 	domain = kzalloc(sizeof(*domain), GFP_KERNEL);  in ipmmu_domain_alloc()
464 	if (!domain)  in ipmmu_domain_alloc()
467 	spin_lock_init(&domain->lock);  in ipmmu_domain_alloc()
469 	return &domain->io_domain;  in ipmmu_domain_alloc()
474 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_domain_free()  local
480 	ipmmu_domain_destroy_context(domain);  in ipmmu_domain_free()
481 	free_io_pgtable_ops(domain->iop);  in ipmmu_domain_free()
482 	kfree(domain);  in ipmmu_domain_free()
490 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_attach_device()  local
500 	spin_lock_irqsave(&domain->lock, flags);  in ipmmu_attach_device()
502 	if (!domain->mmu) {  in ipmmu_attach_device()
504 		domain->mmu = mmu;  in ipmmu_attach_device()
505 		ret = ipmmu_domain_init_context(domain);  in ipmmu_attach_device()
506 	} else if (domain->mmu != mmu) {  in ipmmu_attach_device()
512 			dev_name(mmu->dev), dev_name(domain->mmu->dev));  in ipmmu_attach_device()
516 	spin_unlock_irqrestore(&domain->lock, flags);  in ipmmu_attach_device()
522 		ipmmu_utlb_enable(domain, archdata->utlbs[i]);  in ipmmu_attach_device()
531 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_detach_device()  local
535 		ipmmu_utlb_disable(domain, archdata->utlbs[i]);  in ipmmu_detach_device()
545 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_map()  local
547 	if (!domain)  in ipmmu_map()
550 	return domain->iop->map(domain->iop, iova, paddr, size, prot);  in ipmmu_map()
556 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_unmap()  local
558 	return domain->iop->unmap(domain->iop, iova, size);  in ipmmu_unmap()
564 	struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);  in ipmmu_iova_to_phys()  local
568 	return domain->iop->iova_to_phys(domain->iop, iova);  in ipmmu_iova_to_phys()