330 static u16 s5h1409_readreg(struct s5h1409_state *state, u8 reg)  in s5h1409_readreg()  function
456 			s5h1409_readreg(state, 0xe3) | 0x1100);  in s5h1409_set_gpio()
459 			s5h1409_readreg(state, 0xe3) & 0xfeff);  in s5h1409_set_gpio()
498 	reg = s5h1409_readreg(state, 0xf0);  in s5h1409_set_qam_amhum_mode()
542 	reg = s5h1409_readreg(state, 0xf0);  in s5h1409_set_qam_amhum_mode_legacy()
575 	reg = s5h1409_readreg(state, 0xf1);  in s5h1409_set_qam_interleave_mode()
583 			reg1 = s5h1409_readreg(state, 0xb2);  in s5h1409_set_qam_interleave_mode()
584 			reg2 = s5h1409_readreg(state, 0xad);  in s5h1409_set_qam_interleave_mode()
597 				s5h1409_readreg(state, 0xab) | 0x1001);  in s5h1409_set_qam_interleave_mode()
608 	reg = s5h1409_readreg(state, 0xf1);  in s5h1409_set_qam_interleave_mode_legacy()
614 			reg1 = s5h1409_readreg(state, 0xb2);  in s5h1409_set_qam_interleave_mode_legacy()
615 			reg2 = s5h1409_readreg(state, 0xad);  in s5h1409_set_qam_interleave_mode_legacy()
621 				s5h1409_readreg(state, 0xab) & 0xeffe);  in s5h1409_set_qam_interleave_mode_legacy()
628 				s5h1409_readreg(state, 0xab) | 0x1001);  in s5h1409_set_qam_interleave_mode_legacy()
683 	val = s5h1409_readreg(state, 0xac) & 0xcfff;  in s5h1409_set_mpeg_timing()
741 			s5h1409_readreg(state, 0xab) | 0x100); /* Serial */  in s5h1409_init()
744 			s5h1409_readreg(state, 0xab) & 0xfeff); /* Parallel */  in s5h1409_init()
778 	reg = s5h1409_readreg(state, 0xf1);  in s5h1409_read_status()
864 		reg = s5h1409_readreg(state, 0xf0) & 0xff;  in s5h1409_read_snr()
867 		reg = s5h1409_readreg(state, 0xf0) & 0xff;  in s5h1409_read_snr()
870 		reg = s5h1409_readreg(state, 0xf1) & 0x3ff;  in s5h1409_read_snr()
918 	*ucblocks = s5h1409_readreg(state, 0xb5);  in s5h1409_read_ucblocks()
972 	reg = s5h1409_readreg(state, 0x04);  in s5h1409_attach()