342 static int s5h1411_writereg(struct s5h1411_state *state,  in s5h1411_writereg()  function
383 	s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf7, 0);  in s5h1411_softreset()
384 	s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf7, 1);  in s5h1411_softreset()
396 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x10d5);  in s5h1411_set_if_freq()
397 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x5342);  in s5h1411_set_if_freq()
398 		s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x10d9);  in s5h1411_set_if_freq()
401 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1225);  in s5h1411_set_if_freq()
402 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x1e96);  in s5h1411_set_if_freq()
403 		s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x1225);  in s5h1411_set_if_freq()
406 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x14bc);  in s5h1411_set_if_freq()
407 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0xb53e);  in s5h1411_set_if_freq()
408 		s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x14bd);  in s5h1411_set_if_freq()
416 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4);  in s5h1411_set_if_freq()
417 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x3655);  in s5h1411_set_if_freq()
418 		s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x2c, 0x1be4);  in s5h1411_set_if_freq()
454 	return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xbe, val);  in s5h1411_set_mpeg_timing()
469 	return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x24, val);  in s5h1411_set_spectralinversion()
483 	return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xbd, val);  in s5h1411_set_serialmode()
503 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x71);  in s5h1411_enable_modulation()
504 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf6, 0x00);  in s5h1411_enable_modulation()
505 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xcd, 0xf1);  in s5h1411_enable_modulation()
512 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x0171);  in s5h1411_enable_modulation()
513 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf6, 0x0001);  in s5h1411_enable_modulation()
514 		s5h1411_writereg(state, S5H1411_I2C_QAM_ADDR, 0x16, 0x1101);  in s5h1411_enable_modulation()
515 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xcd, 0x00f0);  in s5h1411_enable_modulation()
536 		return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 1);  in s5h1411_i2c_gate_ctrl()
538 		return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 0);  in s5h1411_i2c_gate_ctrl()
551 		return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xe0,  in s5h1411_set_gpio()
554 		return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xe0, val);  in s5h1411_set_gpio()
564 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf4, 1);  in s5h1411_set_powerstate()
566 		s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf4, 0);  in s5h1411_set_powerstate()
584 	return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf3, 0);  in s5h1411_register_reset()
631 		s5h1411_writereg(state, init_tab[i].addr,  in s5h1411_init()
904 	s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 1);  in s5h1411_attach()