33 #define CXL_READ_VSEC_LENGTH(dev, vsec, dest)			\  argument
35 		pci_read_config_word(dev, vsec + 0x6, dest);	\
38 #define CXL_READ_VSEC_NAFUS(dev, vsec, dest) \  argument
39 	pci_read_config_byte(dev, vsec + 0x8, dest)
41 #define CXL_READ_VSEC_STATUS(dev, vsec, dest) \  argument
42 	pci_read_config_byte(dev, vsec + 0x9, dest)
54 #define CXL_READ_VSEC_MODE_CONTROL(dev, vsec, dest) \  argument
55 	pci_read_config_byte(dev, vsec + 0xa, dest)
56 #define CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val) \  argument
57 	pci_write_config_byte(dev, vsec + 0xa, val)
64 #define CXL_READ_VSEC_PSL_REVISION(dev, vsec, dest) \  argument
65 	pci_read_config_word(dev, vsec + 0xc, dest)
66 #define CXL_READ_VSEC_CAIA_MINOR(dev, vsec, dest) \  argument
67 	pci_read_config_byte(dev, vsec + 0xe, dest)
68 #define CXL_READ_VSEC_CAIA_MAJOR(dev, vsec, dest) \  argument
69 	pci_read_config_byte(dev, vsec + 0xf, dest)
70 #define CXL_READ_VSEC_BASE_IMAGE(dev, vsec, dest) \  argument
71 	pci_read_config_word(dev, vsec + 0x10, dest)
73 #define CXL_READ_VSEC_IMAGE_STATE(dev, vsec, dest) \  argument
74 	pci_read_config_byte(dev, vsec + 0x13, dest)
75 #define CXL_WRITE_VSEC_IMAGE_STATE(dev, vsec, val) \  argument
76 	pci_write_config_byte(dev, vsec + 0x13, val)
81 #define CXL_READ_VSEC_AFU_DESC_OFF(dev, vsec, dest) \  argument
82 	pci_read_config_dword(dev, vsec + 0x20, dest)
83 #define CXL_READ_VSEC_AFU_DESC_SIZE(dev, vsec, dest) \  argument
84 	pci_read_config_dword(dev, vsec + 0x24, dest)
85 #define CXL_READ_VSEC_PS_OFF(dev, vsec, dest) \  argument
86 	pci_read_config_dword(dev, vsec + 0x28, dest)
87 #define CXL_READ_VSEC_PS_SIZE(dev, vsec, dest) \  argument
88 	pci_read_config_dword(dev, vsec + 0x2c, dest)
174 	int vsec = 0;  in find_cxl_vsec()  local
177 	while ((vsec = pci_find_next_ext_capability(dev, vsec, PCI_EXT_CAP_ID_VNDR))) {  in find_cxl_vsec()
178 		pci_read_config_word(dev, vsec + 0x4, &val);  in find_cxl_vsec()
180 			return vsec;  in find_cxl_vsec()
188 	int vsec;  in dump_cxl_config_space()  local
213 	if (!(vsec = find_cxl_vsec(dev)))  in dump_cxl_config_space()
219 	pci_read_config_dword(dev, vsec + 0x0, &val);  in dump_cxl_config_space()
223 	pci_read_config_dword(dev, vsec + 0x4, &val);  in dump_cxl_config_space()
227 	pci_read_config_dword(dev, vsec + 0x8, &val);  in dump_cxl_config_space()
232 	pci_read_config_dword(dev, vsec + 0xc, &val);  in dump_cxl_config_space()
235 	pci_read_config_dword(dev, vsec + 0x10, &val);  in dump_cxl_config_space()
242 	pci_read_config_dword(dev, vsec + 0x14, &val);  in dump_cxl_config_space()
244 	pci_read_config_dword(dev, vsec + 0x18, &val);  in dump_cxl_config_space()
246 	pci_read_config_dword(dev, vsec + 0x1c, &val);  in dump_cxl_config_space()
249 	pci_read_config_dword(dev, vsec + 0x20, &val);  in dump_cxl_config_space()
251 	pci_read_config_dword(dev, vsec + 0x24, &val);  in dump_cxl_config_space()
253 	pci_read_config_dword(dev, vsec + 0x28, &val);  in dump_cxl_config_space()
255 	pci_read_config_dword(dev, vsec + 0x2c, &val);  in dump_cxl_config_space()
258 	pci_read_config_dword(dev, vsec + 0x30, &val);  in dump_cxl_config_space()
260 	pci_read_config_dword(dev, vsec + 0x34, &val);  in dump_cxl_config_space()
262 	pci_read_config_dword(dev, vsec + 0x38, &val);  in dump_cxl_config_space()
264 	pci_read_config_dword(dev, vsec + 0x3c, &val);  in dump_cxl_config_space()
267 	pci_read_config_dword(dev, vsec + 0x40, &val);  in dump_cxl_config_space()
269 	pci_read_config_dword(dev, vsec + 0x44, &val);  in dump_cxl_config_space()
272 	pci_read_config_dword(dev, vsec + 0x48, &val);  in dump_cxl_config_space()
274 	pci_read_config_dword(dev, vsec + 0x4c, &val);  in dump_cxl_config_space()
277 	pci_read_config_dword(dev, vsec + 0x50, &val);  in dump_cxl_config_space()
279 	pci_read_config_dword(dev, vsec + 0x54, &val);  in dump_cxl_config_space()
281 	pci_read_config_dword(dev, vsec + 0x58, &val);  in dump_cxl_config_space()
283 	pci_read_config_dword(dev, vsec + 0x58, &val);  in dump_cxl_config_space()
447 	int vsec;  in cxl_update_image_control()  local
450 	if (!(vsec = find_cxl_vsec(dev))) {  in cxl_update_image_control()
455 	if ((rc = CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state))) {  in cxl_update_image_control()
470 	if ((rc = CXL_WRITE_VSEC_IMAGE_STATE(dev, vsec, image_state))) {  in cxl_update_image_control()
529 	int vsec;  in switch_card_to_cxl()  local
535 	if (!(vsec = find_cxl_vsec(dev))) {  in switch_card_to_cxl()
540 	if ((rc = CXL_READ_VSEC_MODE_CONTROL(dev, vsec, &val))) {  in switch_card_to_cxl()
546 	if ((rc = CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val))) {  in switch_card_to_cxl()
993 	int vsec;  in cxl_read_vsec()  local
999 	if (!(vsec = find_cxl_vsec(dev))) {  in cxl_read_vsec()
1004 	CXL_READ_VSEC_LENGTH(dev, vsec, &vseclen);  in cxl_read_vsec()
1010 	CXL_READ_VSEC_STATUS(dev, vsec, &adapter->vsec_status);  in cxl_read_vsec()
1011 	CXL_READ_VSEC_PSL_REVISION(dev, vsec, &adapter->psl_rev);  in cxl_read_vsec()
1012 	CXL_READ_VSEC_CAIA_MAJOR(dev, vsec, &adapter->caia_major);  in cxl_read_vsec()
1013 	CXL_READ_VSEC_CAIA_MINOR(dev, vsec, &adapter->caia_minor);  in cxl_read_vsec()
1014 	CXL_READ_VSEC_BASE_IMAGE(dev, vsec, &adapter->base_image);  in cxl_read_vsec()
1015 	CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state);  in cxl_read_vsec()
1019 	CXL_READ_VSEC_NAFUS(dev, vsec, &adapter->slices);  in cxl_read_vsec()
1020 	CXL_READ_VSEC_AFU_DESC_OFF(dev, vsec, &afu_desc_off);  in cxl_read_vsec()
1021 	CXL_READ_VSEC_AFU_DESC_SIZE(dev, vsec, &afu_desc_size);  in cxl_read_vsec()
1022 	CXL_READ_VSEC_PS_OFF(dev, vsec, &ps_off);  in cxl_read_vsec()
1023 	CXL_READ_VSEC_PS_SIZE(dev, vsec, &ps_size);  in cxl_read_vsec()