36 struct gpiomtd {  struct
43 #define gpio_nand_getpriv(x) container_of(x, struct gpiomtd, mtd_info)  argument
54 static void gpio_nand_dosync(struct gpiomtd *gpiomtd)  in gpio_nand_dosync()  argument
58 	if (gpiomtd->io_sync) {  in gpio_nand_dosync()
64 		tmp = readl(gpiomtd->io_sync);  in gpio_nand_dosync()
69 static inline void gpio_nand_dosync(struct gpiomtd *gpiomtd) {}  in gpio_nand_dosync()  argument
74 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);  in gpio_nand_cmd_ctrl()  local
76 	gpio_nand_dosync(gpiomtd);  in gpio_nand_cmd_ctrl()
79 		gpio_set_value(gpiomtd->plat.gpio_nce, !(ctrl & NAND_NCE));  in gpio_nand_cmd_ctrl()
80 		gpio_set_value(gpiomtd->plat.gpio_cle, !!(ctrl & NAND_CLE));  in gpio_nand_cmd_ctrl()
81 		gpio_set_value(gpiomtd->plat.gpio_ale, !!(ctrl & NAND_ALE));  in gpio_nand_cmd_ctrl()
82 		gpio_nand_dosync(gpiomtd);  in gpio_nand_cmd_ctrl()
87 	writeb(cmd, gpiomtd->nand_chip.IO_ADDR_W);  in gpio_nand_cmd_ctrl()
88 	gpio_nand_dosync(gpiomtd);  in gpio_nand_cmd_ctrl()
93 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);  in gpio_nand_devready()  local
95 	return gpio_get_value(gpiomtd->plat.gpio_rdy);  in gpio_nand_devready()
196 	struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);  in gpio_nand_remove()  local
198 	nand_release(&gpiomtd->mtd_info);  in gpio_nand_remove()
200 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))  in gpio_nand_remove()
201 		gpio_set_value(gpiomtd->plat.gpio_nwp, 0);  in gpio_nand_remove()
202 	gpio_set_value(gpiomtd->plat.gpio_nce, 1);  in gpio_nand_remove()
209 	struct gpiomtd *gpiomtd;  in gpio_nand_probe()  local
218 	gpiomtd = devm_kzalloc(&pdev->dev, sizeof(*gpiomtd), GFP_KERNEL);  in gpio_nand_probe()
219 	if (!gpiomtd)  in gpio_nand_probe()
222 	chip = &gpiomtd->nand_chip;  in gpio_nand_probe()
231 		gpiomtd->io_sync = devm_ioremap_resource(&pdev->dev, res);  in gpio_nand_probe()
232 		if (IS_ERR(gpiomtd->io_sync))  in gpio_nand_probe()
233 			return PTR_ERR(gpiomtd->io_sync);  in gpio_nand_probe()
236 	ret = gpio_nand_get_config(&pdev->dev, &gpiomtd->plat);  in gpio_nand_probe()
240 	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nce, "NAND NCE");  in gpio_nand_probe()
243 	gpio_direction_output(gpiomtd->plat.gpio_nce, 1);  in gpio_nand_probe()
245 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) {  in gpio_nand_probe()
246 		ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nwp,  in gpio_nand_probe()
252 	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");  in gpio_nand_probe()
255 	gpio_direction_output(gpiomtd->plat.gpio_ale, 0);  in gpio_nand_probe()
257 	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");  in gpio_nand_probe()
260 	gpio_direction_output(gpiomtd->plat.gpio_cle, 0);  in gpio_nand_probe()
262 	if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) {  in gpio_nand_probe()
263 		ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_rdy,  in gpio_nand_probe()
267 		gpio_direction_input(gpiomtd->plat.gpio_rdy);  in gpio_nand_probe()
273 	chip->options		= gpiomtd->plat.options;  in gpio_nand_probe()
274 	chip->chip_delay	= gpiomtd->plat.chip_delay;  in gpio_nand_probe()
277 	gpiomtd->mtd_info.priv	= chip;  in gpio_nand_probe()
278 	gpiomtd->mtd_info.dev.parent = &pdev->dev;  in gpio_nand_probe()
280 	platform_set_drvdata(pdev, gpiomtd);  in gpio_nand_probe()
282 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))  in gpio_nand_probe()
283 		gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);  in gpio_nand_probe()
285 	if (nand_scan(&gpiomtd->mtd_info, 1)) {  in gpio_nand_probe()
290 	if (gpiomtd->plat.adjust_parts)  in gpio_nand_probe()
291 		gpiomtd->plat.adjust_parts(&gpiomtd->plat,  in gpio_nand_probe()
292 					   gpiomtd->mtd_info.size);  in gpio_nand_probe()
295 	ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata,  in gpio_nand_probe()
296 					gpiomtd->plat.parts,  in gpio_nand_probe()
297 					gpiomtd->plat.num_parts);  in gpio_nand_probe()
302 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))  in gpio_nand_probe()
303 		gpio_set_value(gpiomtd->plat.gpio_nwp, 0);  in gpio_nand_probe()