Lines Matching refs:QUADSPI_MCR
46 #define QUADSPI_MCR 0x00 macro
491 reg = readl(base + QUADSPI_MCR); in fsl_qspi_runcmd()
496 writel(reg | QUADSPI_MCR_CLR_RXF_MASK, base + QUADSPI_MCR); in fsl_qspi_runcmd()
524 writel(reg, base + QUADSPI_MCR); in fsl_qspi_runcmd()
564 reg = readl(q->iobase + QUADSPI_MCR); in fsl_qspi_invalid()
566 writel(reg, q->iobase + QUADSPI_MCR); in fsl_qspi_invalid()
575 writel(reg, q->iobase + QUADSPI_MCR); in fsl_qspi_invalid()
589 tmp = readl(q->iobase + QUADSPI_MCR); in fsl_qspi_nor_write()
590 writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR); in fsl_qspi_nor_write()
717 base + QUADSPI_MCR); in fsl_qspi_nor_setup()
725 base + QUADSPI_MCR); in fsl_qspi_nor_setup()
735 base + QUADSPI_MCR); in fsl_qspi_nor_setup()
1106 writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR); in fsl_qspi_remove()