264 	void __iomem *iobase;  member
313 	writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);  in fsl_qspi_unlock_lut()
314 	writel(QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR);  in fsl_qspi_unlock_lut()
319 	writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);  in fsl_qspi_lock_lut()
320 	writel(QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR);  in fsl_qspi_lock_lut()
329 	reg = readl(q->iobase + QUADSPI_FR);  in fsl_qspi_irq_handler()
330 	writel(reg, q->iobase + QUADSPI_FR);  in fsl_qspi_irq_handler()
341 	void __iomem *base = q->iobase;  in fsl_qspi_init_lut()
481 	void __iomem *base = q->iobase;  in fsl_qspi_runcmd()
536 		tmp = readl(q->iobase + QUADSPI_RBDR + i * 4);  in fsl_qspi_read_data()
564 	reg = readl(q->iobase + QUADSPI_MCR);  in fsl_qspi_invalid()
566 	writel(reg, q->iobase + QUADSPI_MCR);  in fsl_qspi_invalid()
575 	writel(reg, q->iobase + QUADSPI_MCR);  in fsl_qspi_invalid()
589 	tmp = readl(q->iobase + QUADSPI_MCR);  in fsl_qspi_nor_write()
590 	writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR);  in fsl_qspi_nor_write()
595 		writel(tmp, q->iobase + QUADSPI_TBDR);  in fsl_qspi_nor_write()
602 			writel(tmp, q->iobase + QUADSPI_TBDR);  in fsl_qspi_nor_write()
616 	void __iomem *base = q->iobase;  in fsl_qspi_set_map_addr()
639 	void __iomem *base = q->iobase;  in fsl_qspi_init_abh_read()
661 		q->iobase + QUADSPI_BFGENCR);  in fsl_qspi_init_abh_read()
699 	void __iomem *base = q->iobase;  in fsl_qspi_nor_setup()
738 	writel(0xffffffff, q->iobase + QUADSPI_FR);  in fsl_qspi_nor_setup()
741 	writel(QUADSPI_RSER_TFIE, q->iobase + QUADSPI_RSER);  in fsl_qspi_nor_setup()
954 	q->iobase = devm_ioremap_resource(dev, res);  in fsl_qspi_probe()
955 	if (IS_ERR(q->iobase))  in fsl_qspi_probe()
956 		return PTR_ERR(q->iobase);  in fsl_qspi_probe()
1106 	writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);  in fsl_qspi_remove()
1107 	writel(0x0, q->iobase + QUADSPI_RSER);  in fsl_qspi_remove()