Lines Matching refs:_mv88e6xxx_reg_read

94 static int _mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg)  in _mv88e6xxx_reg_read()  function
120 ret = _mv88e6xxx_reg_read(ds, addr, reg); in mv88e6xxx_reg_read()
223 return _mv88e6xxx_reg_read(ds, addr, regnum); in _mv88e6xxx_phy_read()
500 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); in mv88e6xxx_adjust_link()
558 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_OP); in _mv88e6xxx_stats_wait()
605 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32); in _mv88e6xxx_stats_read()
611 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01); in _mv88e6xxx_stats_read()
697 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stat()
704 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stat()
808 ret = _mv88e6xxx_reg_read(ds, reg, offset); in _mv88e6xxx_wait()
870 return _mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA); in _mv88e6xxx_phy_read_indirect()
903 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS); in mv88e6xxx_get_eee()
1049 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL); in mv88e6xxx_set_port_state()
1084 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_BASE_VLAN); in _mv88e6xxx_port_vlan_map_set()
1132 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_DEFAULT_VLAN); in _mv88e6xxx_port_pvid_get()
1198 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_stu_data_read()
1262 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); in _mv88e6xxx_vtu_getnext()
1276 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_getnext()
1283 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_getnext()
1356 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_SID); in _mv88e6xxx_stu_getnext()
1362 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); in _mv88e6xxx_stu_getnext()
1666 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_atu_mac_read()
1787 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA); in _mv88e6xxx_atu_getnext()
1941 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); in mv88e6xxx_setup_port()