Lines Matching refs:ds
27 static void assert_smi_lock(struct dsa_switch *ds) in assert_smi_lock() argument
29 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in assert_smi_lock()
32 dev_err(ds->master_dev, "SMI lock not held!\n"); in assert_smi_lock()
94 static int _mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg) in _mv88e6xxx_reg_read() argument
96 struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); in _mv88e6xxx_reg_read()
99 assert_smi_lock(ds); in _mv88e6xxx_reg_read()
104 ret = __mv88e6xxx_reg_read(bus, ds->pd->sw_addr, addr, reg); in _mv88e6xxx_reg_read()
108 dev_dbg(ds->master_dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", in _mv88e6xxx_reg_read()
114 int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg) in mv88e6xxx_reg_read() argument
116 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_reg_read()
120 ret = _mv88e6xxx_reg_read(ds, addr, reg); in mv88e6xxx_reg_read()
158 static int _mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, in _mv88e6xxx_reg_write() argument
161 struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); in _mv88e6xxx_reg_write()
163 assert_smi_lock(ds); in _mv88e6xxx_reg_write()
168 dev_dbg(ds->master_dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", in _mv88e6xxx_reg_write()
171 return __mv88e6xxx_reg_write(bus, ds->pd->sw_addr, addr, reg, val); in _mv88e6xxx_reg_write()
174 int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) in mv88e6xxx_reg_write() argument
176 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_reg_write()
180 ret = _mv88e6xxx_reg_write(ds, addr, reg, val); in mv88e6xxx_reg_write()
186 int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr) in mv88e6xxx_set_addr_direct() argument
195 int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr) in mv88e6xxx_set_addr_indirect() argument
220 static int _mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum) in _mv88e6xxx_phy_read() argument
223 return _mv88e6xxx_reg_read(ds, addr, regnum); in _mv88e6xxx_phy_read()
227 static int _mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, in _mv88e6xxx_phy_write() argument
231 return _mv88e6xxx_reg_write(ds, addr, regnum, val); in _mv88e6xxx_phy_write()
236 static int mv88e6xxx_ppu_disable(struct dsa_switch *ds) in mv88e6xxx_ppu_disable() argument
257 static int mv88e6xxx_ppu_enable(struct dsa_switch *ds) in mv88e6xxx_ppu_enable() argument
283 struct dsa_switch *ds = ((struct dsa_switch *)ps) - 1; in mv88e6xxx_ppu_reenable_work() local
285 if (mv88e6xxx_ppu_enable(ds) == 0) in mv88e6xxx_ppu_reenable_work()
298 static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds) in mv88e6xxx_ppu_access_get() argument
300 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_ppu_access_get()
311 ret = mv88e6xxx_ppu_disable(ds); in mv88e6xxx_ppu_access_get()
325 static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds) in mv88e6xxx_ppu_access_put() argument
327 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_ppu_access_put()
334 void mv88e6xxx_ppu_state_init(struct dsa_switch *ds) in mv88e6xxx_ppu_state_init() argument
336 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_ppu_state_init()
345 int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum) in mv88e6xxx_phy_read_ppu() argument
349 ret = mv88e6xxx_ppu_access_get(ds); in mv88e6xxx_phy_read_ppu()
351 ret = mv88e6xxx_reg_read(ds, addr, regnum); in mv88e6xxx_phy_read_ppu()
352 mv88e6xxx_ppu_access_put(ds); in mv88e6xxx_phy_read_ppu()
358 int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr, in mv88e6xxx_phy_write_ppu() argument
363 ret = mv88e6xxx_ppu_access_get(ds); in mv88e6xxx_phy_write_ppu()
365 ret = mv88e6xxx_reg_write(ds, addr, regnum, val); in mv88e6xxx_phy_write_ppu()
366 mv88e6xxx_ppu_access_put(ds); in mv88e6xxx_phy_write_ppu()
373 static bool mv88e6xxx_6065_family(struct dsa_switch *ds) in mv88e6xxx_6065_family() argument
375 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6065_family()
387 static bool mv88e6xxx_6095_family(struct dsa_switch *ds) in mv88e6xxx_6095_family() argument
389 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6095_family()
399 static bool mv88e6xxx_6097_family(struct dsa_switch *ds) in mv88e6xxx_6097_family() argument
401 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6097_family()
413 static bool mv88e6xxx_6165_family(struct dsa_switch *ds) in mv88e6xxx_6165_family() argument
415 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6165_family()
426 static bool mv88e6xxx_6185_family(struct dsa_switch *ds) in mv88e6xxx_6185_family() argument
428 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6185_family()
444 static bool mv88e6xxx_6320_family(struct dsa_switch *ds) in mv88e6xxx_6320_family() argument
446 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6320_family()
456 static bool mv88e6xxx_6351_family(struct dsa_switch *ds) in mv88e6xxx_6351_family() argument
458 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6351_family()
470 static bool mv88e6xxx_6352_family(struct dsa_switch *ds) in mv88e6xxx_6352_family() argument
472 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_6352_family()
488 void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port, in mv88e6xxx_adjust_link() argument
491 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_adjust_link()
500 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); in mv88e6xxx_adjust_link()
514 if (mv88e6xxx_6065_family(ds) && phydev->speed > SPEED_100) in mv88e6xxx_adjust_link()
536 if ((mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds)) && in mv88e6xxx_adjust_link()
546 _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_PCS_CTRL, reg); in mv88e6xxx_adjust_link()
552 static int _mv88e6xxx_stats_wait(struct dsa_switch *ds) in _mv88e6xxx_stats_wait() argument
558 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_OP); in _mv88e6xxx_stats_wait()
566 static int _mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port) in _mv88e6xxx_stats_snapshot() argument
570 if (mv88e6xxx_6320_family(ds) || mv88e6xxx_6352_family(ds)) in _mv88e6xxx_stats_snapshot()
574 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, in _mv88e6xxx_stats_snapshot()
581 ret = _mv88e6xxx_stats_wait(ds); in _mv88e6xxx_stats_snapshot()
588 static void _mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val) in _mv88e6xxx_stats_read() argument
595 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, in _mv88e6xxx_stats_read()
601 ret = _mv88e6xxx_stats_wait(ds); in _mv88e6xxx_stats_read()
605 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32); in _mv88e6xxx_stats_read()
611 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01); in _mv88e6xxx_stats_read()
656 static bool have_sw_in_discards(struct dsa_switch *ds) in have_sw_in_discards() argument
658 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in have_sw_in_discards()
672 static void _mv88e6xxx_get_strings(struct dsa_switch *ds, in _mv88e6xxx_get_strings() argument
685 static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds, in _mv88e6xxx_get_ethtool_stat() argument
697 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stat()
704 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stat()
711 _mv88e6xxx_stats_read(ds, s->reg, &low); in _mv88e6xxx_get_ethtool_stat()
713 _mv88e6xxx_stats_read(ds, s->reg + 1, &high); in _mv88e6xxx_get_ethtool_stat()
719 static void _mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, in _mv88e6xxx_get_ethtool_stats() argument
724 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in _mv88e6xxx_get_ethtool_stats()
730 ret = _mv88e6xxx_stats_snapshot(ds, port); in _mv88e6xxx_get_ethtool_stats()
738 data[i] = _mv88e6xxx_get_ethtool_stat(ds, i, stats, port); in _mv88e6xxx_get_ethtool_stats()
745 mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data) in mv88e6xxx_get_strings() argument
747 if (have_sw_in_discards(ds)) in mv88e6xxx_get_strings()
748 _mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6xxx_hw_stats), in mv88e6xxx_get_strings()
751 _mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6xxx_hw_stats) - 3, in mv88e6xxx_get_strings()
755 int mv88e6xxx_get_sset_count(struct dsa_switch *ds) in mv88e6xxx_get_sset_count() argument
757 if (have_sw_in_discards(ds)) in mv88e6xxx_get_sset_count()
763 mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, in mv88e6xxx_get_ethtool_stats() argument
766 if (have_sw_in_discards(ds)) in mv88e6xxx_get_ethtool_stats()
768 ds, ARRAY_SIZE(mv88e6xxx_hw_stats), in mv88e6xxx_get_ethtool_stats()
772 ds, ARRAY_SIZE(mv88e6xxx_hw_stats) - 3, in mv88e6xxx_get_ethtool_stats()
776 int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port) in mv88e6xxx_get_regs_len() argument
781 void mv88e6xxx_get_regs(struct dsa_switch *ds, int port, in mv88e6xxx_get_regs() argument
794 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), i); in mv88e6xxx_get_regs()
800 static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, in _mv88e6xxx_wait() argument
808 ret = _mv88e6xxx_reg_read(ds, reg, offset); in _mv88e6xxx_wait()
819 static int mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, u16 mask) in mv88e6xxx_wait() argument
821 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_wait()
825 ret = _mv88e6xxx_wait(ds, reg, offset, mask); in mv88e6xxx_wait()
831 static int _mv88e6xxx_phy_wait(struct dsa_switch *ds) in _mv88e6xxx_phy_wait() argument
833 return _mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, in _mv88e6xxx_phy_wait()
837 int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds) in mv88e6xxx_eeprom_load_wait() argument
839 return mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, in mv88e6xxx_eeprom_load_wait()
843 int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds) in mv88e6xxx_eeprom_busy_wait() argument
845 return mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, in mv88e6xxx_eeprom_busy_wait()
849 static int _mv88e6xxx_atu_wait(struct dsa_switch *ds) in _mv88e6xxx_atu_wait() argument
851 return _mv88e6xxx_wait(ds, REG_GLOBAL, GLOBAL_ATU_OP, in _mv88e6xxx_atu_wait()
855 static int _mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, in _mv88e6xxx_phy_read_indirect() argument
860 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, in _mv88e6xxx_phy_read_indirect()
866 ret = _mv88e6xxx_phy_wait(ds); in _mv88e6xxx_phy_read_indirect()
870 return _mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA); in _mv88e6xxx_phy_read_indirect()
873 static int _mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, in _mv88e6xxx_phy_write_indirect() argument
878 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA, val); in _mv88e6xxx_phy_write_indirect()
882 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, in _mv88e6xxx_phy_write_indirect()
886 return _mv88e6xxx_phy_wait(ds); in _mv88e6xxx_phy_write_indirect()
889 int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) in mv88e6xxx_get_eee() argument
891 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_get_eee()
896 reg = _mv88e6xxx_phy_read_indirect(ds, port, 16); in mv88e6xxx_get_eee()
903 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS); in mv88e6xxx_get_eee()
915 int mv88e6xxx_set_eee(struct dsa_switch *ds, int port, in mv88e6xxx_set_eee() argument
918 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_set_eee()
924 ret = _mv88e6xxx_phy_read_indirect(ds, port, 16); in mv88e6xxx_set_eee()
934 ret = _mv88e6xxx_phy_write_indirect(ds, port, 16, reg); in mv88e6xxx_set_eee()
941 static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, u16 cmd) in _mv88e6xxx_atu_cmd() argument
945 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_OP, cmd); in _mv88e6xxx_atu_cmd()
949 return _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_atu_cmd()
952 static int _mv88e6xxx_atu_data_write(struct dsa_switch *ds, in _mv88e6xxx_atu_data_write() argument
972 return _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_DATA, data); in _mv88e6xxx_atu_data_write()
975 static int _mv88e6xxx_atu_flush_move(struct dsa_switch *ds, in _mv88e6xxx_atu_flush_move() argument
982 err = _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_atu_flush_move()
986 err = _mv88e6xxx_atu_data_write(ds, entry); in _mv88e6xxx_atu_flush_move()
991 err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_FID, in _mv88e6xxx_atu_flush_move()
1003 return _mv88e6xxx_atu_cmd(ds, op); in _mv88e6xxx_atu_flush_move()
1006 static int _mv88e6xxx_atu_flush(struct dsa_switch *ds, u16 fid, bool static_too) in _mv88e6xxx_atu_flush() argument
1013 return _mv88e6xxx_atu_flush_move(ds, &entry, static_too); in _mv88e6xxx_atu_flush()
1016 static int _mv88e6xxx_atu_move(struct dsa_switch *ds, u16 fid, int from_port, in _mv88e6xxx_atu_move() argument
1031 return _mv88e6xxx_atu_flush_move(ds, &entry, static_too); in _mv88e6xxx_atu_move()
1034 static int _mv88e6xxx_atu_remove(struct dsa_switch *ds, u16 fid, int port, in _mv88e6xxx_atu_remove() argument
1038 return _mv88e6xxx_atu_move(ds, fid, port, 0x0f, static_too); in _mv88e6xxx_atu_remove()
1041 static int mv88e6xxx_set_port_state(struct dsa_switch *ds, int port, u8 state) in mv88e6xxx_set_port_state() argument
1043 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_set_port_state()
1049 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL); in mv88e6xxx_set_port_state()
1063 ret = _mv88e6xxx_atu_remove(ds, 0, port, false); in mv88e6xxx_set_port_state()
1068 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL, in mv88e6xxx_set_port_state()
1077 static int _mv88e6xxx_port_vlan_map_set(struct dsa_switch *ds, int port, in _mv88e6xxx_port_vlan_map_set() argument
1080 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in _mv88e6xxx_port_vlan_map_set()
1084 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_BASE_VLAN); in _mv88e6xxx_port_vlan_map_set()
1091 return _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_BASE_VLAN, reg); in _mv88e6xxx_port_vlan_map_set()
1094 int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state) in mv88e6xxx_port_stp_update() argument
1096 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_stp_update()
1116 netdev_dbg(ds->ports[port], "port state %d [%d]\n", state, stp_state); in mv88e6xxx_port_stp_update()
1128 static int _mv88e6xxx_port_pvid_get(struct dsa_switch *ds, int port, u16 *pvid) in _mv88e6xxx_port_pvid_get() argument
1132 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_DEFAULT_VLAN); in _mv88e6xxx_port_pvid_get()
1141 int mv88e6xxx_port_pvid_get(struct dsa_switch *ds, int port, u16 *pvid) in mv88e6xxx_port_pvid_get() argument
1145 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_DEFAULT_VLAN); in mv88e6xxx_port_pvid_get()
1154 static int _mv88e6xxx_port_pvid_set(struct dsa_switch *ds, int port, u16 pvid) in _mv88e6xxx_port_pvid_set() argument
1156 return _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_DEFAULT_VLAN, in _mv88e6xxx_port_pvid_set()
1160 static int _mv88e6xxx_vtu_wait(struct dsa_switch *ds) in _mv88e6xxx_vtu_wait() argument
1162 return _mv88e6xxx_wait(ds, REG_GLOBAL, GLOBAL_VTU_OP, in _mv88e6xxx_vtu_wait()
1166 static int _mv88e6xxx_vtu_cmd(struct dsa_switch *ds, u16 op) in _mv88e6xxx_vtu_cmd() argument
1170 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_OP, op); in _mv88e6xxx_vtu_cmd()
1174 return _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_cmd()
1177 static int _mv88e6xxx_vtu_stu_flush(struct dsa_switch *ds) in _mv88e6xxx_vtu_stu_flush() argument
1181 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_stu_flush()
1185 return _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_FLUSH_ALL); in _mv88e6xxx_vtu_stu_flush()
1188 static int _mv88e6xxx_vtu_stu_data_read(struct dsa_switch *ds, in _mv88e6xxx_vtu_stu_data_read() argument
1192 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in _mv88e6xxx_vtu_stu_data_read()
1198 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_stu_data_read()
1216 static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds, in _mv88e6xxx_vtu_stu_data_write() argument
1220 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in _mv88e6xxx_vtu_stu_data_write()
1233 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, in _mv88e6xxx_vtu_stu_data_write()
1242 static int _mv88e6xxx_vtu_vid_write(struct dsa_switch *ds, u16 vid) in _mv88e6xxx_vtu_vid_write() argument
1244 return _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, in _mv88e6xxx_vtu_vid_write()
1248 static int _mv88e6xxx_vtu_getnext(struct dsa_switch *ds, in _mv88e6xxx_vtu_getnext() argument
1254 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_getnext()
1258 ret = _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_VTU_GET_NEXT); in _mv88e6xxx_vtu_getnext()
1262 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); in _mv88e6xxx_vtu_getnext()
1270 ret = _mv88e6xxx_vtu_stu_data_read(ds, &next, 0); in _mv88e6xxx_vtu_getnext()
1274 if (mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ds) || in _mv88e6xxx_vtu_getnext()
1275 mv88e6xxx_6351_family(ds) || mv88e6xxx_6352_family(ds)) { in _mv88e6xxx_vtu_getnext()
1276 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_getnext()
1283 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_getnext()
1296 static int _mv88e6xxx_vtu_loadpurge(struct dsa_switch *ds, in _mv88e6xxx_vtu_loadpurge() argument
1302 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_loadpurge()
1310 ret = _mv88e6xxx_vtu_stu_data_write(ds, entry, 0); in _mv88e6xxx_vtu_loadpurge()
1314 if (mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ds) || in _mv88e6xxx_vtu_loadpurge()
1315 mv88e6xxx_6351_family(ds) || mv88e6xxx_6352_family(ds)) { in _mv88e6xxx_vtu_loadpurge()
1317 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, reg); in _mv88e6xxx_vtu_loadpurge()
1322 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_FID, reg); in _mv88e6xxx_vtu_loadpurge()
1330 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, reg); in _mv88e6xxx_vtu_loadpurge()
1334 return _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_VTU_LOAD_PURGE); in _mv88e6xxx_vtu_loadpurge()
1337 static int _mv88e6xxx_stu_getnext(struct dsa_switch *ds, u8 sid, in _mv88e6xxx_stu_getnext() argument
1343 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_stu_getnext()
1347 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, in _mv88e6xxx_stu_getnext()
1352 ret = _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_STU_GET_NEXT); in _mv88e6xxx_stu_getnext()
1356 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_SID); in _mv88e6xxx_stu_getnext()
1362 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); in _mv88e6xxx_stu_getnext()
1369 ret = _mv88e6xxx_vtu_stu_data_read(ds, &next, 2); in _mv88e6xxx_stu_getnext()
1378 static int _mv88e6xxx_stu_loadpurge(struct dsa_switch *ds, in _mv88e6xxx_stu_loadpurge() argument
1384 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_stu_loadpurge()
1392 ret = _mv88e6xxx_vtu_stu_data_write(ds, entry, 2); in _mv88e6xxx_stu_loadpurge()
1398 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, reg); in _mv88e6xxx_stu_loadpurge()
1403 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, reg); in _mv88e6xxx_stu_loadpurge()
1407 return _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_STU_LOAD_PURGE); in _mv88e6xxx_stu_loadpurge()
1410 static int _mv88e6xxx_vlan_init(struct dsa_switch *ds, u16 vid, in _mv88e6xxx_vlan_init() argument
1413 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in _mv88e6xxx_vlan_init()
1423 vlan.data[i] = dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i) in _mv88e6xxx_vlan_init()
1427 if (mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ds) || in _mv88e6xxx_vlan_init()
1428 mv88e6xxx_6351_family(ds) || mv88e6xxx_6352_family(ds)) { in _mv88e6xxx_vlan_init()
1437 err = _mv88e6xxx_stu_getnext(ds, GLOBAL_VTU_SID_MASK, &vstp); in _mv88e6xxx_vlan_init()
1446 err = _mv88e6xxx_stu_loadpurge(ds, &vstp); in _mv88e6xxx_vlan_init()
1452 err = _mv88e6xxx_atu_flush(ds, vlan.fid, true); in _mv88e6xxx_vlan_init()
1461 int mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port, in mv88e6xxx_port_vlan_prepare() argument
1475 static int _mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, u16 vid, in _mv88e6xxx_port_vlan_add() argument
1481 err = _mv88e6xxx_vtu_vid_write(ds, vid - 1); in _mv88e6xxx_port_vlan_add()
1485 err = _mv88e6xxx_vtu_getnext(ds, &vlan); in _mv88e6xxx_port_vlan_add()
1490 err = _mv88e6xxx_vlan_init(ds, vid, &vlan); in _mv88e6xxx_port_vlan_add()
1499 return _mv88e6xxx_vtu_loadpurge(ds, &vlan); in _mv88e6xxx_port_vlan_add()
1502 int mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, in mv88e6xxx_port_vlan_add() argument
1506 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_vlan_add()
1515 err = _mv88e6xxx_port_vlan_add(ds, port, vid, untagged); in mv88e6xxx_port_vlan_add()
1522 err = _mv88e6xxx_port_pvid_set(ds, port, vlan->vid_end); in mv88e6xxx_port_vlan_add()
1529 static int _mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, u16 vid) in _mv88e6xxx_port_vlan_del() argument
1531 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in _mv88e6xxx_port_vlan_del()
1535 err = _mv88e6xxx_vtu_vid_write(ds, vid - 1); in _mv88e6xxx_port_vlan_del()
1539 err = _mv88e6xxx_vtu_getnext(ds, &vlan); in _mv88e6xxx_port_vlan_del()
1552 if (dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i)) in _mv88e6xxx_port_vlan_del()
1561 err = _mv88e6xxx_vtu_loadpurge(ds, &vlan); in _mv88e6xxx_port_vlan_del()
1565 return _mv88e6xxx_atu_remove(ds, vlan.fid, port, false); in _mv88e6xxx_port_vlan_del()
1568 int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, in mv88e6xxx_port_vlan_del() argument
1571 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_vlan_del()
1577 err = _mv88e6xxx_port_pvid_get(ds, port, &pvid); in mv88e6xxx_port_vlan_del()
1582 err = _mv88e6xxx_port_vlan_del(ds, port, vid); in mv88e6xxx_port_vlan_del()
1587 err = _mv88e6xxx_port_pvid_set(ds, port, 0); in mv88e6xxx_port_vlan_del()
1599 int mv88e6xxx_vlan_getnext(struct dsa_switch *ds, u16 *vid, in mv88e6xxx_vlan_getnext() argument
1602 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_vlan_getnext()
1611 err = _mv88e6xxx_vtu_vid_write(ds, *vid); in mv88e6xxx_vlan_getnext()
1615 err = _mv88e6xxx_vtu_getnext(ds, &next); in mv88e6xxx_vlan_getnext()
1631 if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) in mv88e6xxx_vlan_getnext()
1645 static int _mv88e6xxx_atu_mac_write(struct dsa_switch *ds, in _mv88e6xxx_atu_mac_write() argument
1652 ds, REG_GLOBAL, GLOBAL_ATU_MAC_01 + i, in _mv88e6xxx_atu_mac_write()
1661 static int _mv88e6xxx_atu_mac_read(struct dsa_switch *ds, unsigned char *addr) in _mv88e6xxx_atu_mac_read() argument
1666 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_atu_mac_read()
1677 static int _mv88e6xxx_atu_load(struct dsa_switch *ds, in _mv88e6xxx_atu_load() argument
1682 ret = _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_atu_load()
1686 ret = _mv88e6xxx_atu_mac_write(ds, entry->mac); in _mv88e6xxx_atu_load()
1690 ret = _mv88e6xxx_atu_data_write(ds, entry); in _mv88e6xxx_atu_load()
1694 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_FID, entry->fid); in _mv88e6xxx_atu_load()
1698 return _mv88e6xxx_atu_cmd(ds, GLOBAL_ATU_OP_LOAD_DB); in _mv88e6xxx_atu_load()
1701 static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port, in _mv88e6xxx_port_fdb_load() argument
1715 return _mv88e6xxx_atu_load(ds, &entry); in _mv88e6xxx_port_fdb_load()
1718 int mv88e6xxx_port_fdb_prepare(struct dsa_switch *ds, int port, in mv88e6xxx_port_fdb_prepare() argument
1732 int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port, in mv88e6xxx_port_fdb_add() argument
1739 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_fdb_add()
1743 ret = _mv88e6xxx_port_fdb_load(ds, port, fdb->addr, fdb->vid, state); in mv88e6xxx_port_fdb_add()
1749 int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port, in mv88e6xxx_port_fdb_del() argument
1752 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_fdb_del()
1756 ret = _mv88e6xxx_port_fdb_load(ds, port, fdb->addr, fdb->vid, in mv88e6xxx_port_fdb_del()
1763 static int _mv88e6xxx_atu_getnext(struct dsa_switch *ds, u16 fid, in _mv88e6xxx_atu_getnext() argument
1771 ret = _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_atu_getnext()
1775 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_FID, fid); in _mv88e6xxx_atu_getnext()
1779 ret = _mv88e6xxx_atu_cmd(ds, GLOBAL_ATU_OP_GET_NEXT_DB); in _mv88e6xxx_atu_getnext()
1783 ret = _mv88e6xxx_atu_mac_read(ds, next.mac); in _mv88e6xxx_atu_getnext()
1787 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA); in _mv88e6xxx_atu_getnext()
1812 int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port, in mv88e6xxx_port_fdb_dump() argument
1816 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_fdb_dump()
1824 err = _mv88e6xxx_vtu_vid_write(ds, vlan.vid); in mv88e6xxx_port_fdb_dump()
1833 err = _mv88e6xxx_vtu_getnext(ds, &vlan); in mv88e6xxx_port_fdb_dump()
1840 err = _mv88e6xxx_atu_mac_write(ds, addr.mac); in mv88e6xxx_port_fdb_dump()
1845 err = _mv88e6xxx_atu_getnext(ds, vlan.fid, &addr); in mv88e6xxx_port_fdb_dump()
1877 int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port, u32 members) in mv88e6xxx_port_bridge_join() argument
1879 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_bridge_join()
1880 const u16 pvid = 4000 + ds->index * DSA_MAX_PORTS + port; in mv88e6xxx_port_bridge_join()
1885 err = _mv88e6xxx_port_vlan_del(ds, port, pvid); in mv88e6xxx_port_bridge_join()
1887 err = _mv88e6xxx_port_pvid_set(ds, port, 0); in mv88e6xxx_port_bridge_join()
1892 int mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port, u32 members) in mv88e6xxx_port_bridge_leave() argument
1894 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_bridge_leave()
1895 const u16 pvid = 4000 + ds->index * DSA_MAX_PORTS + port; in mv88e6xxx_port_bridge_leave()
1900 err = _mv88e6xxx_port_vlan_add(ds, port, pvid, true); in mv88e6xxx_port_bridge_leave()
1902 err = _mv88e6xxx_port_pvid_set(ds, port, pvid); in mv88e6xxx_port_bridge_leave()
1910 struct dsa_switch *ds; in mv88e6xxx_bridge_work() local
1914 ds = ((struct dsa_switch *)ps) - 1; in mv88e6xxx_bridge_work()
1919 mv88e6xxx_set_port_state(ds, port, ps->port_state[port]); in mv88e6xxx_bridge_work()
1923 static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) in mv88e6xxx_setup_port() argument
1925 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_setup_port()
1931 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
1932 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
1933 mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) || in mv88e6xxx_setup_port()
1934 mv88e6xxx_6065_family(ds) || mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_port()
1941 reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); in mv88e6xxx_setup_port()
1942 if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) { in mv88e6xxx_setup_port()
1948 if (mv88e6xxx_6065_family(ds)) in mv88e6xxx_setup_port()
1956 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
1977 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
1978 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
1979 mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) || in mv88e6xxx_setup_port()
1980 mv88e6xxx_6185_family(ds) || mv88e6xxx_6320_family(ds)) in mv88e6xxx_setup_port()
1984 if (dsa_is_cpu_port(ds, port)) { in mv88e6xxx_setup_port()
1985 if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) in mv88e6xxx_setup_port()
1987 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
1988 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
1989 mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_port()
1990 if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA) in mv88e6xxx_setup_port()
1998 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
1999 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
2000 mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) || in mv88e6xxx_setup_port()
2001 mv88e6xxx_6185_family(ds) || mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_port()
2002 if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA) in mv88e6xxx_setup_port()
2006 if (dsa_is_dsa_port(ds, port)) { in mv88e6xxx_setup_port()
2007 if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) in mv88e6xxx_setup_port()
2009 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
2010 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
2011 mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_port()
2015 if (port == dsa_upstream_port(ds)) in mv88e6xxx_setup_port()
2020 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2033 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
2034 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
2035 mv88e6xxx_6095_family(ds) || mv88e6xxx_6320_family(ds)) in mv88e6xxx_setup_port()
2038 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
2039 mv88e6xxx_6165_family(ds) || mv88e6xxx_6320_family(ds)) in mv88e6xxx_setup_port()
2042 if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) { in mv88e6xxx_setup_port()
2044 reg |= dsa_upstream_port(ds); in mv88e6xxx_setup_port()
2048 if (port == dsa_upstream_port(ds)) in mv88e6xxx_setup_port()
2055 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2068 if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) in mv88e6xxx_setup_port()
2071 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_ASSOC_VECTOR, reg); in mv88e6xxx_setup_port()
2076 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_RATE_CONTROL_2, in mv88e6xxx_setup_port()
2081 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
2082 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
2083 mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_port()
2088 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2097 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2102 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2110 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2117 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2125 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2131 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_port()
2132 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_port()
2133 mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) || in mv88e6xxx_setup_port()
2134 mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_port()
2136 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2145 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1, 0x0000); in mv88e6xxx_setup_port()
2153 ret = _mv88e6xxx_port_vlan_map_set(ds, port, reg & ~port); in mv88e6xxx_setup_port()
2160 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_DEFAULT_VLAN, in mv88e6xxx_setup_port()
2167 int mv88e6xxx_setup_ports(struct dsa_switch *ds) in mv88e6xxx_setup_ports() argument
2169 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_setup_ports()
2174 ret = mv88e6xxx_setup_port(ds, i); in mv88e6xxx_setup_ports()
2178 if (dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i)) in mv88e6xxx_setup_ports()
2182 ret = mv88e6xxx_port_bridge_leave(ds, i, 0); in mv88e6xxx_setup_ports()
2189 int mv88e6xxx_setup_common(struct dsa_switch *ds) in mv88e6xxx_setup_common() argument
2191 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_setup_common()
2202 int mv88e6xxx_setup_global(struct dsa_switch *ds) in mv88e6xxx_setup_global() argument
2204 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_setup_global()
2246 if (ds->pd->rtable && in mv88e6xxx_setup_global()
2247 i != ds->index && i < ds->dst->pd->nr_chips) in mv88e6xxx_setup_global()
2248 nexthop = ds->pd->rtable[i] & 0x1f; in mv88e6xxx_setup_global()
2268 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_global()
2269 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_global()
2270 mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_global()
2287 if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || in mv88e6xxx_setup_global()
2288 mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || in mv88e6xxx_setup_global()
2289 mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) || in mv88e6xxx_setup_global()
2290 mv88e6xxx_6320_family(ds)) { in mv88e6xxx_setup_global()
2305 ret = _mv88e6xxx_stats_wait(ds); in mv88e6xxx_setup_global()
2310 ret = _mv88e6xxx_atu_flush(ds, 0, true); in mv88e6xxx_setup_global()
2315 ret = _mv88e6xxx_vtu_stu_flush(ds); in mv88e6xxx_setup_global()
2322 int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active) in mv88e6xxx_switch_reset() argument
2324 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_switch_reset()
2362 int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg) in mv88e6xxx_phy_page_read() argument
2364 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_phy_page_read()
2368 ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); in mv88e6xxx_phy_page_read()
2371 ret = _mv88e6xxx_phy_read_indirect(ds, port, reg); in mv88e6xxx_phy_page_read()
2373 _mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); in mv88e6xxx_phy_page_read()
2378 int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page, in mv88e6xxx_phy_page_write() argument
2381 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_phy_page_write()
2385 ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); in mv88e6xxx_phy_page_write()
2389 ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val); in mv88e6xxx_phy_page_write()
2391 _mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); in mv88e6xxx_phy_page_write()
2396 static int mv88e6xxx_port_to_phy_addr(struct dsa_switch *ds, int port) in mv88e6xxx_port_to_phy_addr() argument
2398 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_port_to_phy_addr()
2406 mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum) in mv88e6xxx_phy_read() argument
2408 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_phy_read()
2409 int addr = mv88e6xxx_port_to_phy_addr(ds, port); in mv88e6xxx_phy_read()
2416 ret = _mv88e6xxx_phy_read(ds, addr, regnum); in mv88e6xxx_phy_read()
2422 mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) in mv88e6xxx_phy_write() argument
2424 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_phy_write()
2425 int addr = mv88e6xxx_port_to_phy_addr(ds, port); in mv88e6xxx_phy_write()
2432 ret = _mv88e6xxx_phy_write(ds, addr, regnum, val); in mv88e6xxx_phy_write()
2438 mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum) in mv88e6xxx_phy_read_indirect() argument
2440 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_phy_read_indirect()
2441 int addr = mv88e6xxx_port_to_phy_addr(ds, port); in mv88e6xxx_phy_read_indirect()
2448 ret = _mv88e6xxx_phy_read_indirect(ds, addr, regnum); in mv88e6xxx_phy_read_indirect()
2454 mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum, in mv88e6xxx_phy_write_indirect() argument
2457 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e6xxx_phy_write_indirect()
2458 int addr = mv88e6xxx_port_to_phy_addr(ds, port); in mv88e6xxx_phy_write_indirect()
2465 ret = _mv88e6xxx_phy_write_indirect(ds, addr, regnum, val); in mv88e6xxx_phy_write_indirect()
2472 static int mv88e61xx_get_temp(struct dsa_switch *ds, int *temp) in mv88e61xx_get_temp() argument
2474 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); in mv88e61xx_get_temp()
2482 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x6); in mv88e61xx_get_temp()
2487 ret = _mv88e6xxx_phy_read(ds, 0x0, 0x1a); in mv88e61xx_get_temp()
2491 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret | (1 << 5)); in mv88e61xx_get_temp()
2498 val = _mv88e6xxx_phy_read(ds, 0x0, 0x1a); in mv88e61xx_get_temp()
2505 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret & ~(1 << 5)); in mv88e61xx_get_temp()
2512 _mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x0); in mv88e61xx_get_temp()
2517 static int mv88e63xx_get_temp(struct dsa_switch *ds, int *temp) in mv88e63xx_get_temp() argument
2519 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; in mv88e63xx_get_temp()
2524 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 27); in mv88e63xx_get_temp()
2533 int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp) in mv88e6xxx_get_temp() argument
2535 if (mv88e6xxx_6320_family(ds) || mv88e6xxx_6352_family(ds)) in mv88e6xxx_get_temp()
2536 return mv88e63xx_get_temp(ds, temp); in mv88e6xxx_get_temp()
2538 return mv88e61xx_get_temp(ds, temp); in mv88e6xxx_get_temp()
2541 int mv88e6xxx_get_temp_limit(struct dsa_switch *ds, int *temp) in mv88e6xxx_get_temp_limit() argument
2543 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; in mv88e6xxx_get_temp_limit()
2546 if (!mv88e6xxx_6320_family(ds) && !mv88e6xxx_6352_family(ds)) in mv88e6xxx_get_temp_limit()
2551 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); in mv88e6xxx_get_temp_limit()
2560 int mv88e6xxx_set_temp_limit(struct dsa_switch *ds, int temp) in mv88e6xxx_set_temp_limit() argument
2562 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; in mv88e6xxx_set_temp_limit()
2565 if (!mv88e6xxx_6320_family(ds) && !mv88e6xxx_6352_family(ds)) in mv88e6xxx_set_temp_limit()
2568 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); in mv88e6xxx_set_temp_limit()
2572 return mv88e6xxx_phy_page_write(ds, phy, 6, 26, in mv88e6xxx_set_temp_limit()
2576 int mv88e6xxx_get_temp_alarm(struct dsa_switch *ds, bool *alarm) in mv88e6xxx_get_temp_alarm() argument
2578 int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; in mv88e6xxx_get_temp_alarm()
2581 if (!mv88e6xxx_6320_family(ds) && !mv88e6xxx_6352_family(ds)) in mv88e6xxx_get_temp_alarm()
2586 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); in mv88e6xxx_get_temp_alarm()