Lines Matching refs:U64_HI
1844 U64_HI(r->rdata_mapping), in bnx2x_execute_vlan_mac()
2536 U64_HI(p->rdata_mapping), in bnx2x_set_rx_mode_e2()
3241 raw->cid, U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e2()
3725 U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e1()
4365 U64_HI(r->rdata_mapping), in bnx2x_setup_rss()
4639 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_tx_data()
4699 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_rx_data()
4703 cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_init_rx_data()
4707 cpu_to_le32(U64_HI(params->rcq_map)); in bnx2x_q_fill_init_rx_data()
4852 U64_HI(data_mapping), in bnx2x_q_send_setup_e1x()
4879 U64_HI(data_mapping), in bnx2x_q_send_setup_e2()
4922 U64_HI(data_mapping), in bnx2x_q_send_setup_tx_only()
5028 o->cids[cid_index], U64_HI(data_mapping), in bnx2x_q_send_update()
5086 data->sge_page_base_hi = cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_update_tpa_data()
5127 U64_HI(data_mapping), in bnx2x_q_send_update_tpa()
5975 U64_HI(data_mapping), in bnx2x_func_send_start()
6054 U64_HI(data_mapping), in bnx2x_func_send_switch_update()
6092 U64_HI(data_mapping), in bnx2x_func_send_afex_update()
6131 U64_HI(*p_rdata), U64_LO(*p_rdata), in bnx2x_func_send_afex_viflists()
6178 U64_HI(data_mapping), in bnx2x_func_send_tx_start()
6205 cpu_to_le32(U64_HI(set_timesync_params->offset_delta)); in bnx2x_func_send_set_timesync()
6214 U64_HI(data_mapping), in bnx2x_func_send_set_timesync()