34 	u64 reg_val;  in nicvf_poll_reg()  local
41 		reg_val = nicvf_queue_reg_read(nic, reg, qidx);  in nicvf_poll_reg()
42 		if (((reg_val & bit_mask) >> bit_pos) == val)  in nicvf_poll_reg()
1244 	u64 reg_val;  in nicvf_enable_intr()  local
1246 	reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);  in nicvf_enable_intr()
1250 		reg_val |= ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);  in nicvf_enable_intr()
1253 		reg_val |= ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);  in nicvf_enable_intr()
1256 		reg_val |= ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);  in nicvf_enable_intr()
1259 		reg_val |= (1ULL << NICVF_INTR_PKT_DROP_SHIFT);  in nicvf_enable_intr()
1262 		reg_val |= (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);  in nicvf_enable_intr()
1265 		reg_val |= (1ULL << NICVF_INTR_MBOX_SHIFT);  in nicvf_enable_intr()
1268 		reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);  in nicvf_enable_intr()
1276 	nicvf_reg_write(nic, NIC_VF_ENA_W1S, reg_val);  in nicvf_enable_intr()
1282 	u64 reg_val = 0;  in nicvf_disable_intr()  local
1286 		reg_val |= ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);  in nicvf_disable_intr()
1289 		reg_val |= ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);  in nicvf_disable_intr()
1292 		reg_val |= ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);  in nicvf_disable_intr()
1295 		reg_val |= (1ULL << NICVF_INTR_PKT_DROP_SHIFT);  in nicvf_disable_intr()
1298 		reg_val |= (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);  in nicvf_disable_intr()
1301 		reg_val |= (1ULL << NICVF_INTR_MBOX_SHIFT);  in nicvf_disable_intr()
1304 		reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);  in nicvf_disable_intr()
1312 	nicvf_reg_write(nic, NIC_VF_ENA_W1C, reg_val);  in nicvf_disable_intr()
1318 	u64 reg_val = 0;  in nicvf_clear_intr()  local
1322 		reg_val = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);  in nicvf_clear_intr()
1325 		reg_val = ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);  in nicvf_clear_intr()
1328 		reg_val = ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);  in nicvf_clear_intr()
1331 		reg_val = (1ULL << NICVF_INTR_PKT_DROP_SHIFT);  in nicvf_clear_intr()
1334 		reg_val = (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);  in nicvf_clear_intr()
1337 		reg_val = (1ULL << NICVF_INTR_MBOX_SHIFT);  in nicvf_clear_intr()
1340 		reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);  in nicvf_clear_intr()
1348 	nicvf_reg_write(nic, NIC_VF_INT, reg_val);  in nicvf_clear_intr()
1354 	u64 reg_val;  in nicvf_is_intr_enabled()  local
1357 	reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);  in nicvf_is_intr_enabled()
1387 	return (reg_val & mask);  in nicvf_is_intr_enabled()