Lines Matching refs:bgx
28 struct bgx *bgx; member
44 struct bgx { struct
56 static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; argument
83 static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset) in bgx_reg_read() argument
85 void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; in bgx_reg_read()
90 static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val) in bgx_reg_write() argument
92 void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; in bgx_reg_write()
97 static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val) in bgx_reg_modify() argument
99 void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; in bgx_reg_modify()
104 static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) in bgx_poll_reg() argument
110 reg_val = bgx_reg_read(bgx, lmac, reg); in bgx_poll_reg()
139 struct bgx *bgx; in bgx_get_lmac_count() local
141 bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_get_lmac_count()
142 if (bgx) in bgx_get_lmac_count()
143 return bgx->lmac_count; in bgx_get_lmac_count()
153 struct bgx *bgx; in bgx_get_lmac_link_state() local
156 bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_get_lmac_link_state()
157 if (!bgx) in bgx_get_lmac_link_state()
160 lmac = &bgx->lmac[lmacid]; in bgx_get_lmac_link_state()
169 struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_get_lmac_mac() local
171 if (bgx) in bgx_get_lmac_mac()
172 return bgx->lmac[lmacid].mac; in bgx_get_lmac_mac()
180 struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_set_lmac_mac() local
182 if (!bgx) in bgx_set_lmac_mac()
185 ether_addr_copy(bgx->lmac[lmacid].mac, mac); in bgx_set_lmac_mac()
191 struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_lmac_rx_tx_enable() local
194 if (!bgx) in bgx_lmac_rx_tx_enable()
197 cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); in bgx_lmac_rx_tx_enable()
202 bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); in bgx_lmac_rx_tx_enable()
208 struct bgx *bgx = lmac->bgx; in bgx_sgmii_change_link_state() local
213 cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG); in bgx_sgmii_change_link_state()
215 bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); in bgx_sgmii_change_link_state()
217 port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); in bgx_sgmii_change_link_state()
218 misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL); in bgx_sgmii_change_link_state()
235 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); in bgx_sgmii_change_link_state()
236 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); in bgx_sgmii_change_link_state()
244 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); in bgx_sgmii_change_link_state()
245 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); in bgx_sgmii_change_link_state()
253 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512); in bgx_sgmii_change_link_state()
255 bgx_reg_write(bgx, lmac->lmacid, in bgx_sgmii_change_link_state()
258 bgx_reg_write(bgx, lmac->lmacid, in bgx_sgmii_change_link_state()
264 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl); in bgx_sgmii_change_link_state()
265 bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg); in bgx_sgmii_change_link_state()
267 port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); in bgx_sgmii_change_link_state()
271 bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); in bgx_sgmii_change_link_state()
313 struct bgx *bgx; in bgx_get_rx_stats() local
315 bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_get_rx_stats()
316 if (!bgx) in bgx_get_rx_stats()
321 return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8)); in bgx_get_rx_stats()
327 struct bgx *bgx; in bgx_get_tx_stats() local
329 bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_get_tx_stats()
330 if (!bgx) in bgx_get_tx_stats()
333 return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8)); in bgx_get_tx_stats()
337 static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac) in bgx_flush_dmac_addrs() argument
341 while (bgx->lmac[lmac].dmac > 0) { in bgx_flush_dmac_addrs()
342 offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) + in bgx_flush_dmac_addrs()
344 bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0); in bgx_flush_dmac_addrs()
345 bgx->lmac[lmac].dmac--; in bgx_flush_dmac_addrs()
353 struct bgx *bgx; in bgx_lmac_internal_loopback() local
357 bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; in bgx_lmac_internal_loopback()
358 if (!bgx) in bgx_lmac_internal_loopback()
361 lmac = &bgx->lmac[lmac_idx]; in bgx_lmac_internal_loopback()
363 cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL); in bgx_lmac_internal_loopback()
368 bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg); in bgx_lmac_internal_loopback()
370 cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1); in bgx_lmac_internal_loopback()
375 bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg); in bgx_lmac_internal_loopback()
380 static int bgx_lmac_sgmii_init(struct bgx *bgx, int lmacid) in bgx_lmac_sgmii_init() argument
384 bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); in bgx_lmac_sgmii_init()
386 bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE); in bgx_lmac_sgmii_init()
389 cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); in bgx_lmac_sgmii_init()
391 bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0); in bgx_lmac_sgmii_init()
394 bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); in bgx_lmac_sgmii_init()
397 bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET); in bgx_lmac_sgmii_init()
398 if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, in bgx_lmac_sgmii_init()
400 dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n"); in bgx_lmac_sgmii_init()
405 cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL); in bgx_lmac_sgmii_init()
408 bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); in bgx_lmac_sgmii_init()
410 if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS, in bgx_lmac_sgmii_init()
412 dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n"); in bgx_lmac_sgmii_init()
419 static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type) in bgx_lmac_xaui_init() argument
424 bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET); in bgx_lmac_xaui_init()
425 if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { in bgx_lmac_xaui_init()
426 dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); in bgx_lmac_xaui_init()
431 cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); in bgx_lmac_xaui_init()
433 bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); in bgx_lmac_xaui_init()
435 bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); in bgx_lmac_xaui_init()
437 if (bgx->lmac_type != BGX_MODE_RXAUI) in bgx_lmac_xaui_init()
438 bgx_reg_modify(bgx, lmacid, in bgx_lmac_xaui_init()
441 bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, in bgx_lmac_xaui_init()
445 cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT); in bgx_lmac_xaui_init()
446 bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg); in bgx_lmac_xaui_init()
447 cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT); in bgx_lmac_xaui_init()
448 bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg); in bgx_lmac_xaui_init()
449 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); in bgx_lmac_xaui_init()
450 bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); in bgx_lmac_xaui_init()
452 if (bgx->use_training) { in bgx_lmac_xaui_init()
453 bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00); in bgx_lmac_xaui_init()
454 bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00); in bgx_lmac_xaui_init()
455 bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00); in bgx_lmac_xaui_init()
457 bgx_reg_modify(bgx, lmacid, in bgx_lmac_xaui_init()
462 bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D); in bgx_lmac_xaui_init()
465 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL); in bgx_lmac_xaui_init()
467 bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg); in bgx_lmac_xaui_init()
470 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL); in bgx_lmac_xaui_init()
472 bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg); in bgx_lmac_xaui_init()
474 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV); in bgx_lmac_xaui_init()
475 if (bgx->lmac_type == BGX_MODE_10G_KR) in bgx_lmac_xaui_init()
477 else if (bgx->lmac_type == BGX_MODE_40G_KR) in bgx_lmac_xaui_init()
482 bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg); in bgx_lmac_xaui_init()
484 cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL); in bgx_lmac_xaui_init()
486 bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg); in bgx_lmac_xaui_init()
489 bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); in bgx_lmac_xaui_init()
491 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1); in bgx_lmac_xaui_init()
493 bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg); in bgx_lmac_xaui_init()
495 cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL); in bgx_lmac_xaui_init()
498 bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg); in bgx_lmac_xaui_init()
501 bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1)); in bgx_lmac_xaui_init()
503 bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); in bgx_lmac_xaui_init()
510 struct bgx *bgx = lmac->bgx; in bgx_xaui_check_link() local
512 int lmac_type = bgx->lmac_type; in bgx_xaui_check_link()
515 bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS); in bgx_xaui_check_link()
516 if (bgx->use_training) { in bgx_xaui_check_link()
517 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); in bgx_xaui_check_link()
520 bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); in bgx_xaui_check_link()
521 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL); in bgx_xaui_check_link()
523 bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg); in bgx_xaui_check_link()
529 if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { in bgx_xaui_check_link()
530 dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); in bgx_xaui_check_link()
536 if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1, in bgx_xaui_check_link()
538 dev_err(&bgx->pdev->dev, in bgx_xaui_check_link()
543 if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS, in bgx_xaui_check_link()
545 dev_err(&bgx->pdev->dev, in bgx_xaui_check_link()
552 bgx_reg_modify(bgx, lmacid, BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); in bgx_xaui_check_link()
553 if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { in bgx_xaui_check_link()
554 dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); in bgx_xaui_check_link()
555 if (bgx->use_training) { in bgx_xaui_check_link()
556 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); in bgx_xaui_check_link()
559 bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); in bgx_xaui_check_link()
560 cfg = bgx_reg_read(bgx, lmacid, in bgx_xaui_check_link()
563 bgx_reg_write(bgx, lmacid, in bgx_xaui_check_link()
572 if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_RX_CTL, in bgx_xaui_check_link()
574 dev_err(&bgx->pdev->dev, "SMU RX link not okay\n"); in bgx_xaui_check_link()
579 if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { in bgx_xaui_check_link()
580 dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); in bgx_xaui_check_link()
585 if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) { in bgx_xaui_check_link()
586 dev_err(&bgx->pdev->dev, "SMU TX not idle\n"); in bgx_xaui_check_link()
590 if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { in bgx_xaui_check_link()
591 dev_err(&bgx->pdev->dev, "Receive fault\n"); in bgx_xaui_check_link()
596 bgx_reg_modify(bgx, lmacid, BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); in bgx_xaui_check_link()
597 if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_STATUS1, in bgx_xaui_check_link()
599 dev_err(&bgx->pdev->dev, "SPU receive link down\n"); in bgx_xaui_check_link()
603 cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); in bgx_xaui_check_link()
605 bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); in bgx_xaui_check_link()
617 bgx_reg_modify(lmac->bgx, lmac->lmacid, in bgx_poll_for_link()
619 bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, in bgx_poll_for_link()
622 link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); in bgx_poll_for_link()
625 if (lmac->bgx->lmac_type == BGX_MODE_XLAUI) in bgx_poll_for_link()
645 static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid) in bgx_lmac_enable() argument
650 lmac = &bgx->lmac[lmacid]; in bgx_lmac_enable()
651 lmac->bgx = bgx; in bgx_lmac_enable()
653 if (bgx->lmac_type == BGX_MODE_SGMII) { in bgx_lmac_enable()
655 if (bgx_lmac_sgmii_init(bgx, lmacid)) in bgx_lmac_enable()
659 if (bgx_lmac_xaui_init(bgx, lmacid, bgx->lmac_type)) in bgx_lmac_enable()
664 cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); in bgx_lmac_enable()
666 bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg); in bgx_lmac_enable()
667 bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1); in bgx_lmac_enable()
669 cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND); in bgx_lmac_enable()
671 bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg); in bgx_lmac_enable()
672 bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4); in bgx_lmac_enable()
676 bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); in bgx_lmac_enable()
679 bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03); in bgx_lmac_enable()
681 if ((bgx->lmac_type != BGX_MODE_XFI) && in bgx_lmac_enable()
682 (bgx->lmac_type != BGX_MODE_XLAUI) && in bgx_lmac_enable()
683 (bgx->lmac_type != BGX_MODE_40G_KR) && in bgx_lmac_enable()
684 (bgx->lmac_type != BGX_MODE_10G_KR)) { in bgx_lmac_enable()
708 static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) in bgx_lmac_disable() argument
713 lmac = &bgx->lmac[lmacid]; in bgx_lmac_disable()
720 cmrx_cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); in bgx_lmac_disable()
722 bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cmrx_cfg); in bgx_lmac_disable()
723 bgx_flush_dmac_addrs(bgx, lmacid); in bgx_lmac_disable()
725 if ((bgx->lmac_type != BGX_MODE_XFI) && in bgx_lmac_disable()
726 (bgx->lmac_type != BGX_MODE_XLAUI) && in bgx_lmac_disable()
727 (bgx->lmac_type != BGX_MODE_40G_KR) && in bgx_lmac_disable()
728 (bgx->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) in bgx_lmac_disable()
734 static void bgx_set_num_ports(struct bgx *bgx) in bgx_set_num_ports() argument
738 switch (bgx->qlm_mode) { in bgx_set_num_ports()
740 bgx->lmac_count = 4; in bgx_set_num_ports()
741 bgx->lmac_type = BGX_MODE_SGMII; in bgx_set_num_ports()
742 bgx->lane_to_sds = 0; in bgx_set_num_ports()
745 bgx->lmac_count = 1; in bgx_set_num_ports()
746 bgx->lmac_type = BGX_MODE_XAUI; in bgx_set_num_ports()
747 bgx->lane_to_sds = 0xE4; in bgx_set_num_ports()
750 bgx->lmac_count = 2; in bgx_set_num_ports()
751 bgx->lmac_type = BGX_MODE_RXAUI; in bgx_set_num_ports()
752 bgx->lane_to_sds = 0xE4; in bgx_set_num_ports()
755 bgx->lmac_count = 4; in bgx_set_num_ports()
756 bgx->lmac_type = BGX_MODE_XFI; in bgx_set_num_ports()
757 bgx->lane_to_sds = 0; in bgx_set_num_ports()
760 bgx->lmac_count = 1; in bgx_set_num_ports()
761 bgx->lmac_type = BGX_MODE_XLAUI; in bgx_set_num_ports()
762 bgx->lane_to_sds = 0xE4; in bgx_set_num_ports()
765 bgx->lmac_count = 4; in bgx_set_num_ports()
766 bgx->lmac_type = BGX_MODE_10G_KR; in bgx_set_num_ports()
767 bgx->lane_to_sds = 0; in bgx_set_num_ports()
768 bgx->use_training = 1; in bgx_set_num_ports()
771 bgx->lmac_count = 1; in bgx_set_num_ports()
772 bgx->lmac_type = BGX_MODE_40G_KR; in bgx_set_num_ports()
773 bgx->lane_to_sds = 0xE4; in bgx_set_num_ports()
774 bgx->use_training = 1; in bgx_set_num_ports()
777 bgx->lmac_count = 0; in bgx_set_num_ports()
785 lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7; in bgx_set_num_ports()
787 bgx->lmac_count = lmac_count; in bgx_set_num_ports()
790 static void bgx_init_hw(struct bgx *bgx) in bgx_init_hw() argument
794 bgx_set_num_ports(bgx); in bgx_init_hw()
796 bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP); in bgx_init_hw()
797 if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS)) in bgx_init_hw()
798 dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id); in bgx_init_hw()
801 for (i = 0; i < bgx->lmac_count; i++) { in bgx_init_hw()
802 if (bgx->lmac_type == BGX_MODE_RXAUI) { in bgx_init_hw()
804 bgx->lane_to_sds = 0x0e; in bgx_init_hw()
806 bgx->lane_to_sds = 0x04; in bgx_init_hw()
807 bgx_reg_write(bgx, i, BGX_CMRX_CFG, in bgx_init_hw()
808 (bgx->lmac_type << 8) | bgx->lane_to_sds); in bgx_init_hw()
811 bgx_reg_write(bgx, i, BGX_CMRX_CFG, in bgx_init_hw()
812 (bgx->lmac_type << 8) | (bgx->lane_to_sds + i)); in bgx_init_hw()
813 bgx->lmac[i].lmacid_bd = lmac_count; in bgx_init_hw()
817 bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count); in bgx_init_hw()
818 bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count); in bgx_init_hw()
821 for (i = 0; i < bgx->lmac_count; i++) in bgx_init_hw()
822 bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND, in bgx_init_hw()
828 bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00); in bgx_init_hw()
832 bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00); in bgx_init_hw()
835 static void bgx_get_qlm_mode(struct bgx *bgx) in bgx_get_qlm_mode() argument
837 struct device *dev = &bgx->pdev->dev; in bgx_get_qlm_mode()
844 lmac_type = bgx_reg_read(bgx, 0, BGX_CMRX_CFG); in bgx_get_qlm_mode()
847 train_en = bgx_reg_read(bgx, 0, BGX_SPUX_BR_PMD_CRTL) & in bgx_get_qlm_mode()
852 bgx->qlm_mode = QLM_MODE_SGMII; in bgx_get_qlm_mode()
853 dev_info(dev, "BGX%d QLM mode: SGMII\n", bgx->bgx_id); in bgx_get_qlm_mode()
856 bgx->qlm_mode = QLM_MODE_XAUI_1X4; in bgx_get_qlm_mode()
857 dev_info(dev, "BGX%d QLM mode: XAUI\n", bgx->bgx_id); in bgx_get_qlm_mode()
860 bgx->qlm_mode = QLM_MODE_RXAUI_2X2; in bgx_get_qlm_mode()
861 dev_info(dev, "BGX%d QLM mode: RXAUI\n", bgx->bgx_id); in bgx_get_qlm_mode()
865 bgx->qlm_mode = QLM_MODE_XFI_4X1; in bgx_get_qlm_mode()
866 dev_info(dev, "BGX%d QLM mode: XFI\n", bgx->bgx_id); in bgx_get_qlm_mode()
868 bgx->qlm_mode = QLM_MODE_10G_KR_4X1; in bgx_get_qlm_mode()
869 dev_info(dev, "BGX%d QLM mode: 10G_KR\n", bgx->bgx_id); in bgx_get_qlm_mode()
874 bgx->qlm_mode = QLM_MODE_XLAUI_1X4; in bgx_get_qlm_mode()
875 dev_info(dev, "BGX%d QLM mode: XLAUI\n", bgx->bgx_id); in bgx_get_qlm_mode()
877 bgx->qlm_mode = QLM_MODE_40G_KR4_1X4; in bgx_get_qlm_mode()
878 dev_info(dev, "BGX%d QLM mode: 40G_KR4\n", bgx->bgx_id); in bgx_get_qlm_mode()
882 bgx->qlm_mode = QLM_MODE_SGMII; in bgx_get_qlm_mode()
883 dev_info(dev, "BGX%d QLM default mode: SGMII\n", bgx->bgx_id); in bgx_get_qlm_mode()
913 struct bgx *bgx = context; in bgx_acpi_register_phy() local
919 acpi_get_mac_address(adev, bgx->lmac[bgx->lmac_count].mac); in bgx_acpi_register_phy()
921 SET_NETDEV_DEV(&bgx->lmac[bgx->lmac_count].netdev, &bgx->pdev->dev); in bgx_acpi_register_phy()
923 bgx->lmac[bgx->lmac_count].lmacid = bgx->lmac_count; in bgx_acpi_register_phy()
925 bgx->lmac_count++; in bgx_acpi_register_phy()
933 struct bgx *bgx = context; in bgx_acpi_match_id() local
936 snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id); in bgx_acpi_match_id()
946 bgx_acpi_register_phy, NULL, bgx, NULL); in bgx_acpi_match_id()
952 static int bgx_init_acpi_phy(struct bgx *bgx) in bgx_init_acpi_phy() argument
954 acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL); in bgx_init_acpi_phy()
960 static int bgx_init_acpi_phy(struct bgx *bgx) in bgx_init_acpi_phy() argument
969 static int bgx_init_of_phy(struct bgx *bgx) in bgx_init_of_phy() argument
978 snprintf(bgx_sel, 5, "bgx%d", bgx->bgx_id); in bgx_init_of_phy()
988 bgx->lmac[lmac].phydev = of_phy_find_device(phy_np); in bgx_init_of_phy()
992 ether_addr_copy(bgx->lmac[lmac].mac, mac); in bgx_init_of_phy()
994 SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev); in bgx_init_of_phy()
995 bgx->lmac[lmac].lmacid = lmac; in bgx_init_of_phy()
1007 static int bgx_init_of_phy(struct bgx *bgx) in bgx_init_of_phy() argument
1014 static int bgx_init_phy(struct bgx *bgx) in bgx_init_phy() argument
1017 return bgx_init_acpi_phy(bgx); in bgx_init_phy()
1019 return bgx_init_of_phy(bgx); in bgx_init_phy()
1026 struct bgx *bgx = NULL; in bgx_probe() local
1032 bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL); in bgx_probe()
1033 if (!bgx) in bgx_probe()
1035 bgx->pdev = pdev; in bgx_probe()
1037 pci_set_drvdata(pdev, bgx); in bgx_probe()
1053 bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); in bgx_probe()
1054 if (!bgx->reg_base) { in bgx_probe()
1059 bgx->bgx_id = (pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM) >> 24) & 1; in bgx_probe()
1060 bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_CN88XX; in bgx_probe()
1062 bgx_vnic[bgx->bgx_id] = bgx; in bgx_probe()
1063 bgx_get_qlm_mode(bgx); in bgx_probe()
1065 err = bgx_init_phy(bgx); in bgx_probe()
1069 bgx_init_hw(bgx); in bgx_probe()
1072 for (lmac = 0; lmac < bgx->lmac_count; lmac++) { in bgx_probe()
1073 err = bgx_lmac_enable(bgx, lmac); in bgx_probe()
1076 bgx->bgx_id, lmac); in bgx_probe()
1084 bgx_vnic[bgx->bgx_id] = NULL; in bgx_probe()
1095 struct bgx *bgx = pci_get_drvdata(pdev); in bgx_remove() local
1099 for (lmac = 0; lmac < bgx->lmac_count; lmac++) in bgx_remove()
1100 bgx_lmac_disable(bgx, lmac); in bgx_remove()
1102 bgx_vnic[bgx->bgx_id] = NULL; in bgx_remove()