Lines Matching refs:RCV_INT
54 #define RCV_INT BIT(10) macro
59 #define DEF_INT_MASK (RCV_INT | DEF_INT_ERR)
307 val = RCV_INT; in hip04_mac_enable()
470 priv->reg_inten &= ~(RCV_INT); in hip04_mac_start_xmit()
471 writel_relaxed(DEF_INT_MASK & ~RCV_INT, in hip04_mac_start_xmit()
550 if (!(priv->reg_inten & RCV_INT)) { in hip04_rx_poll()
552 priv->reg_inten |= RCV_INT; in hip04_rx_poll()
589 if (ists & RCV_INT && napi_schedule_prep(&priv->napi)) { in hip04_mac_interrupt()
591 priv->reg_inten &= ~(RCV_INT); in hip04_mac_interrupt()
592 writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN); in hip04_mac_interrupt()
608 priv->reg_inten &= ~(RCV_INT); in tx_done()
609 writel_relaxed(DEF_INT_MASK & ~RCV_INT, priv->base + PPE_INTEN); in tx_done()