Lines Matching refs:q
70 void hns_rcb_reset_ring_hw(struct hnae_queue *q) in hns_rcb_reset_ring_hw() argument
80 tx_fbd_num = dsaf_read_dev(q, RCB_RING_TX_RING_FBDNUM_REG); in hns_rcb_reset_ring_hw()
84 dsaf_write_dev(q, RCB_RING_PREFETCH_EN_REG, 0); in hns_rcb_reset_ring_hw()
86 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 1); in hns_rcb_reset_ring_hw()
89 could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST); in hns_rcb_reset_ring_hw()
93 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 0); in hns_rcb_reset_ring_hw()
95 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 1); in hns_rcb_reset_ring_hw()
98 could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST); in hns_rcb_reset_ring_hw()
103 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 0); in hns_rcb_reset_ring_hw()
110 dev_err(q->dev->dev, "port%d reset ring fail\n", in hns_rcb_reset_ring_hw()
111 hns_ae_get_vf_cb(q->handle)->port_index); in hns_rcb_reset_ring_hw()
120 void hns_rcb_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask) in hns_rcb_int_ctrl_hw() argument
125 dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG, int_mask_en); in hns_rcb_int_ctrl_hw()
126 dsaf_write_dev(q, RCB_RING_INTMSK_TX_OVERTIME_REG, in hns_rcb_int_ctrl_hw()
131 dsaf_write_dev(q, RCB_RING_INTMSK_RXWL_REG, int_mask_en); in hns_rcb_int_ctrl_hw()
132 dsaf_write_dev(q, RCB_RING_INTMSK_RX_OVERTIME_REG, in hns_rcb_int_ctrl_hw()
137 void hns_rcb_int_clr_hw(struct hnae_queue *q, u32 flag) in hns_rcb_int_clr_hw() argument
142 dsaf_write_dev(q, RCB_RING_INTSTS_TX_RING_REG, clr); in hns_rcb_int_clr_hw()
143 dsaf_write_dev(q, RCB_RING_INTSTS_TX_OVERTIME_REG, clr); in hns_rcb_int_clr_hw()
147 dsaf_write_dev(q, RCB_RING_INTSTS_RX_RING_REG, clr); in hns_rcb_int_clr_hw()
148 dsaf_write_dev(q, RCB_RING_INTSTS_RX_OVERTIME_REG, clr); in hns_rcb_int_clr_hw()
156 void hns_rcb_ring_enable_hw(struct hnae_queue *q, u32 val) in hns_rcb_ring_enable_hw() argument
158 dsaf_write_dev(q, RCB_RING_PREFETCH_EN_REG, !!val); in hns_rcb_ring_enable_hw()
161 void hns_rcb_start(struct hnae_queue *q, u32 val) in hns_rcb_start() argument
163 hns_rcb_ring_enable_hw(q, val); in hns_rcb_start()
184 struct hnae_queue *q = &ring_pair->q; in hns_rcb_ring_init() local
188 (ring_type == RX_RING) ? &q->rx_ring : &q->tx_ring; in hns_rcb_ring_init()
192 dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_L_REG, in hns_rcb_ring_init()
194 dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_H_REG, in hns_rcb_ring_init()
196 dsaf_write_dev(q, RCB_RING_RX_RING_BD_LEN_REG, in hns_rcb_ring_init()
198 dsaf_write_dev(q, RCB_RING_RX_RING_BD_NUM_REG, in hns_rcb_ring_init()
200 dsaf_write_dev(q, RCB_RING_RX_RING_PKTLINE_REG, in hns_rcb_ring_init()
203 dsaf_write_dev(q, RCB_RING_TX_RING_BASEADDR_L_REG, in hns_rcb_ring_init()
205 dsaf_write_dev(q, RCB_RING_TX_RING_BASEADDR_H_REG, in hns_rcb_ring_init()
207 dsaf_write_dev(q, RCB_RING_TX_RING_BD_LEN_REG, in hns_rcb_ring_init()
209 dsaf_write_dev(q, RCB_RING_TX_RING_BD_NUM_REG, in hns_rcb_ring_init()
211 dsaf_write_dev(q, RCB_RING_TX_RING_PKTLINE_REG, in hns_rcb_ring_init()
384 static void hns_rcb_ring_get_cfg(struct hnae_queue *q, int ring_type) in hns_rcb_ring_get_cfg() argument
393 ring_pair_cb = container_of(q, struct ring_pair_cb, q); in hns_rcb_ring_get_cfg()
395 ring = &q->rx_ring; in hns_rcb_ring_get_cfg()
396 ring->io_base = ring_pair_cb->q.io_base; in hns_rcb_ring_get_cfg()
399 ring = &q->tx_ring; in hns_rcb_ring_get_cfg()
400 ring->io_base = (u8 __iomem *)ring_pair_cb->q.io_base + in hns_rcb_ring_get_cfg()
426 ring_pair_cb->q.handle = NULL; in hns_rcb_ring_pair_get_cfg()
428 hns_rcb_ring_get_cfg(&ring_pair_cb->q, RX_RING); in hns_rcb_ring_pair_get_cfg()
429 hns_rcb_ring_get_cfg(&ring_pair_cb->q, TX_RING); in hns_rcb_ring_pair_get_cfg()
477 ring_pair_cb->q.io_base = in hns_rcb_get_cfg()
484 ring_pair_cb->q.phy_base = in hns_rcb_get_cfg()
731 container_of(queue, struct ring_pair_cb, q); in hns_rcb_update_stats()
765 container_of(queue, struct ring_pair_cb, q); in hns_rcb_get_stats()
976 = container_of(queue, struct ring_pair_cb, q); in hns_rcb_get_ring_regs()