Lines Matching refs:wr32
1086 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
1288 wr32(hw, I40E_PFGEN_CTRL, in i40e_pf_reset()
1353 wr32(hw, I40E_PFINT_ICR0_ENA, 0); in i40e_clear_hw()
1356 wr32(hw, I40E_PFINT_DYN_CTLN(i), val); in i40e_clear_hw()
1360 wr32(hw, I40E_PFINT_LNKLST0, val); in i40e_clear_hw()
1362 wr32(hw, I40E_PFINT_LNKLSTN(i), val); in i40e_clear_hw()
1365 wr32(hw, I40E_VPINT_LNKLST0(i), val); in i40e_clear_hw()
1367 wr32(hw, I40E_VPINT_LNKLSTN(i), val); in i40e_clear_hw()
1384 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()
1390 wr32(hw, I40E_QINT_TQCTL(i), 0); in i40e_clear_hw()
1391 wr32(hw, I40E_QTX_ENA(i), 0); in i40e_clear_hw()
1392 wr32(hw, I40E_QINT_RQCTL(i), 0); in i40e_clear_hw()
1393 wr32(hw, I40E_QRX_ENA(i), 0); in i40e_clear_hw()
1419 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK))); in i40e_clear_pxe_mode()
1421 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK)); in i40e_clear_pxe_mode()
1559 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val); in i40e_led_set()
1749 wr32(hw, I40E_GLLAN_RCTL_0, 0x1); in i40e_aq_clear_pxe_mode()
3750 wr32(hw, I40E_PFQF_CTL_0, val); in i40e_set_filter_control()