2802 	wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);  in i40e_configure_tx_ring()
3093 		wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),  in i40e_vsi_configure_msix()
3097 		wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),  in i40e_vsi_configure_msix()
3099 		wr32(hw, I40E_PFINT_RATEN(vector - 1),  in i40e_vsi_configure_msix()
3103 		wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);  in i40e_vsi_configure_msix()
3114 			wr32(hw, I40E_QINT_RQCTL(qp), val);  in i40e_vsi_configure_msix()
3128 			wr32(hw, I40E_QINT_TQCTL(qp), val);  in i40e_vsi_configure_msix()
3146 	wr32(hw, I40E_PFINT_ICR0_ENA, 0);  /* disable all */  in i40e_enable_misc_int_causes()
3164 	wr32(hw, I40E_PFINT_ICR0_ENA, val);  in i40e_enable_misc_int_causes()
3167 	wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |  in i40e_enable_misc_int_causes()
3171 	wr32(hw, I40E_PFINT_STAT_CTL0, 0);  in i40e_enable_misc_int_causes()
3189 	wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);  in i40e_configure_msi_and_legacy()
3192 	wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);  in i40e_configure_msi_and_legacy()
3197 	wr32(hw, I40E_PFINT_LNKLST0, 0);  in i40e_configure_msi_and_legacy()
3204 	wr32(hw, I40E_QINT_RQCTL(0), val);  in i40e_configure_msi_and_legacy()
3210 	wr32(hw, I40E_QINT_TQCTL(0), val);  in i40e_configure_msi_and_legacy()
3222 	wr32(hw, I40E_PFINT_DYN_CTL0,  in i40e_irq_dynamic_disable_icr0()
3240 	wr32(hw, I40E_PFINT_DYN_CTL0, val);  in i40e_irq_dynamic_enable_icr0()
3256 	wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);  in i40e_irq_dynamic_disable()
3351 		wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);  in i40e_vsi_disable_irq()
3352 		wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);  in i40e_vsi_disable_irq()
3358 			wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);  in i40e_vsi_disable_irq()
3365 		wr32(hw, I40E_PFINT_ICR0_ENA, 0);  in i40e_vsi_disable_irq()
3366 		wr32(hw, I40E_PFINT_DYN_CTL0, 0);  in i40e_vsi_disable_irq()
3399 	wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);  in i40e_stop_misc_vector()
3448 		wr32(hw, I40E_QINT_RQCTL(0), qval);  in i40e_intr()
3452 		wr32(hw, I40E_QINT_TQCTL(0), qval);  in i40e_intr()
3528 	wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);  in i40e_intr()
3827 			wr32(hw, I40E_QTX_HEAD(pf_q), 0);  in i40e_vsi_control_tx()
3833 		wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);  in i40e_vsi_control_tx()
3913 		wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);  in i40e_vsi_control_rx()
3998 			wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);  in i40e_vsi_free_irq()
4013 				wr32(hw, I40E_QINT_RQCTL(qp), val);  in i40e_vsi_free_irq()
4028 				wr32(hw, I40E_QINT_TQCTL(qp), val);  in i40e_vsi_free_irq()
4040 		wr32(hw, I40E_PFINT_LNKLST0, val);  in i40e_vsi_free_irq()
4051 		wr32(hw, I40E_QINT_RQCTL(qp), val);  in i40e_vsi_free_irq()
4063 		wr32(hw, I40E_QINT_TQCTL(qp), val);  in i40e_vsi_free_irq()
5298 	wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |  in i40e_open()
5300 	wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |  in i40e_open()
5303 	wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);  in i40e_open()
5463 		wr32(&pf->hw, I40E_GLGEN_RTRIG, val);  in i40e_do_reset()
5474 		wr32(&pf->hw, I40E_GLGEN_RTRIG, val);  in i40e_do_reset()
5880 	wr32(&pf->hw, I40E_PFQF_CTL_1,  in i40e_fdir_flush_and_replay()
6207 		wr32(&pf->hw, pf->hw.aq.arq.len, val);  in i40e_clean_adminq_subtask()
6224 		wr32(&pf->hw, pf->hw.aq.asq.len, val);  in i40e_clean_adminq_subtask()
6285 	wr32(hw, I40E_PFINT_ICR0_ENA, val);  in i40e_clean_adminq_subtask()
6579 			wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);  in i40e_fdir_sb_setup()
6912 		wr32(hw, I40E_GL_MDET_TX, 0xffffffff);  in i40e_handle_mdd_event()
6927 		wr32(hw, I40E_GL_MDET_RX, 0xffffffff);  in i40e_handle_mdd_event()
6934 			wr32(hw, I40E_PF_MDET_TX, 0xFFFF);  in i40e_handle_mdd_event()
6940 			wr32(hw, I40E_PF_MDET_RX, 0xFFFF);  in i40e_handle_mdd_event()
6956 			wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);  in i40e_handle_mdd_event()
6964 			wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);  in i40e_handle_mdd_event()
6983 	wr32(hw, I40E_PFINT_ICR0_ENA, reg);  in i40e_handle_mdd_event()
7768 	wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);  in i40e_setup_misc_vector()
7769 	wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);  in i40e_setup_misc_vector()
7862 		wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);  in i40e_config_rss_reg()
7872 		wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);  in i40e_config_rss_reg()
7898 	wr32(hw, I40E_PFQF_HENA(0), (u32)hena);  in i40e_config_rss()
7899 	wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));  in i40e_config_rss()
7908 	wr32(hw, I40E_PFQF_CTL_0, reg_val);  in i40e_config_rss()
10261 		wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);  in i40e_probe()
10536 		wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);  in i40e_probe()
10699 	wr32(hw, I40E_PFQF_HENA(0), 0);  in i40e_remove()
10700 	wr32(hw, I40E_PFQF_HENA(1), 0);  in i40e_remove()
10885 	wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));  in i40e_shutdown()
10886 	wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));  in i40e_shutdown()
10896 	wr32(hw, I40E_PFPM_APM,  in i40e_shutdown()
10898 	wr32(hw, I40E_PFPM_WUFC,  in i40e_shutdown()
10926 	wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));  in i40e_suspend()
10927 	wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));  in i40e_suspend()