1200 		wr32(reg, (_test[pat] & write));  in reg_pattern_test()
1220 	wr32(reg, write & mask);  in reg_set_and_check()
1284 	wr32(E1000_STATUS, toggle);  in igb_reg_test()
1294 	wr32(E1000_STATUS, before);  in igb_reg_test()
1412 	wr32(E1000_IMC, ~0);  in igb_intr_test()
1456 			wr32(E1000_ICR, ~0);  in igb_intr_test()
1458 			wr32(E1000_IMC, mask);  in igb_intr_test()
1459 			wr32(E1000_ICS, mask);  in igb_intr_test()
1478 		wr32(E1000_ICR, ~0);  in igb_intr_test()
1480 		wr32(E1000_IMS, mask);  in igb_intr_test()
1481 		wr32(E1000_ICS, mask);  in igb_intr_test()
1500 			wr32(E1000_ICR, ~0);  in igb_intr_test()
1502 			wr32(E1000_IMC, ~mask);  in igb_intr_test()
1503 			wr32(E1000_ICS, ~mask);  in igb_intr_test()
1515 	wr32(E1000_IMC, ~0);  in igb_intr_test()
1567 	wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);  in igb_setup_desc_rings()
1636 	wr32(E1000_CTRL, ctrl_reg);  in igb_integrated_phy_loopback()
1672 			wr32(E1000_MPHY_ADDR_CTL, reg);  in igb_setup_loopback_test()
1676 			wr32(E1000_MPHY_DATA, reg);  in igb_setup_loopback_test()
1681 		wr32(E1000_RCTL, reg);  in igb_setup_loopback_test()
1683 		wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);  in igb_setup_loopback_test()
1691 		wr32(E1000_CTRL, reg);  in igb_setup_loopback_test()
1696 		wr32(E1000_CONNSW, reg);  in igb_setup_loopback_test()
1704 			wr32(E1000_PCS_CFG0, reg);  in igb_setup_loopback_test()
1715 		wr32(E1000_PCS_LCTL, reg);  in igb_setup_loopback_test()
1740 		wr32(E1000_MPHY_ADDR_CTL, reg);  in igb_loopback_cleanup()
1744 		wr32(E1000_MPHY_DATA, reg);  in igb_loopback_cleanup()
1749 	wr32(E1000_RCTL, rctl);  in igb_loopback_cleanup()
2585 		wr32(E1000_MRQC, mrqc);  in igb_set_rss_hash_opt()
2903 		wr32(reg, val << shift);  in igb_write_rss_indir_tbl()