Lines Matching refs:wr32
600 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_data()
625 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_clk()
899 wr32(E1000_CTRL_EXT, tmp); in igb_configure_msix()
916 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE | in igb_configure_msix()
924 wr32(E1000_IVAR_MISC, tmp); in igb_configure_msix()
1156 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_set_interrupt_capability()
1487 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1488 wr32(E1000_EIMC, adapter->eims_enable_mask); in igb_irq_disable()
1490 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1493 wr32(E1000_IAM, 0); in igb_irq_disable()
1494 wr32(E1000_IMC, ~0); in igb_irq_disable()
1518 wr32(E1000_EIAC, regval | adapter->eims_enable_mask); in igb_irq_enable()
1520 wr32(E1000_EIAM, regval | adapter->eims_enable_mask); in igb_irq_enable()
1521 wr32(E1000_EIMS, adapter->eims_enable_mask); in igb_irq_enable()
1523 wr32(E1000_MBVFIMR, 0xFF); in igb_irq_enable()
1526 wr32(E1000_IMS, ims); in igb_irq_enable()
1528 wr32(E1000_IMS, IMS_ENABLE_MASK | in igb_irq_enable()
1530 wr32(E1000_IAM, IMS_ENABLE_MASK | in igb_irq_enable()
1572 wr32(E1000_CTRL_EXT, in igb_release_hw_control()
1591 wr32(E1000_CTRL_EXT, in igb_get_hw_control()
1681 wr32(E1000_CONNSW, connsw); in igb_check_swap_media()
1689 wr32(E1000_CONNSW, connsw); in igb_check_swap_media()
1720 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_check_swap_media()
1754 wr32(E1000_CTRL_EXT, reg_data); in igb_up()
1784 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); in igb_down()
1793 wr32(E1000_TCTL, tctl); in igb_down()
1855 wr32(E1000_CONNSW, connsw); in igb_enable_mas()
1893 wr32(E1000_PBA, pba); in igb_reset()
1934 wr32(E1000_PBA, pba); in igb_reset()
1964 wr32(E1000_VFRE, 0); in igb_reset()
1965 wr32(E1000_VFTE, 0); in igb_reset()
1970 wr32(E1000_WUC, 0); in igb_reset()
2024 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); in igb_reset()
2435 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT); in igb_probe()
2436 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT); in igb_probe()
2693 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_disable_sriov()
2809 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE); in igb_remove()
3097 wr32(E1000_CTRL_EXT, reg_data); in __igb_open()
3243 wr32(E1000_TXDCTL(0), 0); in igb_setup_tctl()
3256 wr32(E1000_TCTL, tctl); in igb_setup_tctl()
3275 wr32(E1000_TXDCTL(reg_idx), 0); in igb_configure_tx_ring()
3279 wr32(E1000_TDLEN(reg_idx), in igb_configure_tx_ring()
3281 wr32(E1000_TDBAL(reg_idx), in igb_configure_tx_ring()
3283 wr32(E1000_TDBAH(reg_idx), tdba >> 32); in igb_configure_tx_ring()
3286 wr32(E1000_TDH(reg_idx), 0); in igb_configure_tx_ring()
3294 wr32(E1000_TXDCTL(reg_idx), txdctl); in igb_configure_tx_ring()
3389 wr32(E1000_RSSRK(j), rss_key[j]); in igb_setup_mrqc()
3423 wr32(E1000_RXCSUM, rxcsum); in igb_setup_mrqc()
3452 wr32(E1000_VT_CTL, vtctl); in igb_setup_mrqc()
3464 wr32(E1000_MRQC, mrqc); in igb_setup_mrqc()
3497 wr32(E1000_RXDCTL(0), 0); in igb_setup_rctl()
3505 wr32(E1000_QDE, ALL_QUEUES); in igb_setup_rctl()
3525 wr32(E1000_RCTL, rctl); in igb_setup_rctl()
3544 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_vf_rlpml()
3572 wr32(E1000_RLPML, max_frame_size); in igb_rlpml_set()
3594 wr32(E1000_DVMOLR(vfn), dvmolr); in igb_set_vmolr()
3612 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_vmolr()
3631 wr32(E1000_RXDCTL(reg_idx), 0); in igb_configure_rx_ring()
3634 wr32(E1000_RDBAL(reg_idx), in igb_configure_rx_ring()
3636 wr32(E1000_RDBAH(reg_idx), rdba >> 32); in igb_configure_rx_ring()
3637 wr32(E1000_RDLEN(reg_idx), in igb_configure_rx_ring()
3642 wr32(E1000_RDH(reg_idx), 0); in igb_configure_rx_ring()
3655 wr32(E1000_SRRCTL(reg_idx), srrctl); in igb_configure_rx_ring()
3666 wr32(E1000_RXDCTL(reg_idx), rxdctl); in igb_configure_rx_ring()
3991 wr32(E1000_RAH(rar_entries), 0); in igb_write_uc_addr_list()
3992 wr32(E1000_RAL(rar_entries), 0); in igb_write_uc_addr_list()
4056 wr32(E1000_RCTL, rctl); in igb_set_rx_mode()
4068 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_rx_mode()
4387 wr32(E1000_EICS, eics); in igb_watchdog_task()
4389 wr32(E1000_ICS, E1000_ICS_RXDMT0); in igb_watchdog_task()
5118 wr32(E1000_EICS, in igb_tx_timeout()
5232 wr32(E1000_RQDPC(i), 0); in igb_update_stats()
5418 wr32(E1000_TRGTTIML0, ts.tv_nsec); in igb_tsync_interrupt()
5419 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec); in igb_tsync_interrupt()
5422 wr32(E1000_TSAUXC, tsauxc); in igb_tsync_interrupt()
5432 wr32(E1000_TRGTTIML1, ts.tv_nsec); in igb_tsync_interrupt()
5433 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec); in igb_tsync_interrupt()
5436 wr32(E1000_TSAUXC, tsauxc); in igb_tsync_interrupt()
5463 wr32(E1000_TSICR, ack); in igb_tsync_interrupt()
5500 wr32(E1000_EIMS, adapter->eims_other); in igb_msix_other()
5556 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl); in igb_update_tx_dca()
5576 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl); in igb_update_rx_dca()
5607 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2); in igb_setup_dca()
5643 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE); in __igb_notify_dca()
5722 wr32(E1000_VMOLR(vf), vmolr); in igb_set_vf_promisc()
5780 wr32(E1000_VMOLR(i), vmolr); in igb_restore_vf_multicasts()
5807 wr32(E1000_VLVF(i), reg); in igb_clear_vf_vfta()
5858 wr32(E1000_VLVF(i), reg); in igb_vlvf_set()
5872 wr32(E1000_VMOLR(vf), reg); in igb_vlvf_set()
5886 wr32(E1000_VLVF(i), reg); in igb_vlvf_set()
5901 wr32(E1000_VMOLR(vf), reg); in igb_vlvf_set()
5913 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT)); in igb_set_vmvir()
5915 wr32(E1000_VMVIR(vf), 0); in igb_set_vmvir()
6078 wr32(E1000_VFTE, reg | (1 << vf)); in igb_vf_reset_msg()
6080 wr32(E1000_VFRE, reg | (1 << vf)); in igb_vf_reset_msg()
6350 wr32(E1000_EIMS, q_vector->eims_value); in igb_ring_irq_enable()
7184 wr32(E1000_CTRL, ctrl); in igb_vlan_mode()
7189 wr32(E1000_RCTL, rctl); in igb_vlan_mode()
7194 wr32(E1000_CTRL, ctrl); in igb_vlan_mode()
7344 wr32(E1000_RCTL, rctl); in __igb_shutdown()
7353 wr32(E1000_CTRL, ctrl); in __igb_shutdown()
7358 wr32(E1000_WUC, E1000_WUC_PME_EN); in __igb_shutdown()
7359 wr32(E1000_WUFC, wufc); in __igb_shutdown()
7361 wr32(E1000_WUC, 0); in __igb_shutdown()
7362 wr32(E1000_WUFC, 0); in __igb_shutdown()
7442 wr32(E1000_WUS, ~0); in igb_resume()
7590 wr32(E1000_EIMC, q_vector->eims_value); in igb_netpoll()
7653 wr32(E1000_WUS, ~0); in igb_io_slot_reset()
7717 wr32(E1000_RAL(index), rar_low); in igb_rar_set_qsel()
7719 wr32(E1000_RAH(index), rar_high); in igb_rar_set_qsel()
7790 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */ in igb_set_vf_rate_limit()
7794 wr32(E1000_RTTBCNRM, 0x14); in igb_set_vf_rate_limit()
7795 wr32(E1000_RTTBCNRC, bcnrc_val); in igb_set_vf_rate_limit()
7874 wr32(reg_offset, reg_val); in igb_ndo_set_vf_spoofchk()
7913 wr32(E1000_DTXCTL, reg); in igb_vmm_control()
7919 wr32(E1000_RPLOLR, reg); in igb_vmm_control()
7948 wr32(E1000_DMCTXTH, 0); in igb_init_dmac()
7961 wr32(E1000_FCRTC, reg); in igb_init_dmac()
7984 wr32(E1000_DMACR, reg); in igb_init_dmac()
7989 wr32(E1000_DMCRTRH, 0); in igb_init_dmac()
7993 wr32(E1000_DMCTLX, reg); in igb_init_dmac()
7998 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE - in igb_init_dmac()
8006 wr32(E1000_PCIEMISC, reg); in igb_init_dmac()
8011 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION); in igb_init_dmac()
8012 wr32(E1000_DMACR, 0); in igb_init_dmac()