Lines Matching refs:reg_val
100 u16 reg_val; in ixgbe_check_cs4227_reg() local
102 reg_val = (IXGBE_CS4227_EDC_MODE_DIAG << 1) | 1; in ixgbe_check_cs4227_reg()
103 status = ixgbe_write_cs4227(hw, reg, reg_val); in ixgbe_check_cs4227_reg()
108 reg_val = 0xFFFF; in ixgbe_check_cs4227_reg()
109 ixgbe_read_cs4227(hw, reg, ®_val); in ixgbe_check_cs4227_reg()
110 if (!reg_val) in ixgbe_check_cs4227_reg()
113 if (reg_val) { in ixgbe_check_cs4227_reg()
1090 u32 reg_val; in ixgbe_setup_ixfi_x550em() local
1095 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
1099 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; in ixgbe_setup_ixfi_x550em()
1100 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; in ixgbe_setup_ixfi_x550em()
1105 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G; in ixgbe_setup_ixfi_x550em()
1108 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G; in ixgbe_setup_ixfi_x550em()
1117 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
1124 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
1128 reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_CONV_WO_PROTOCOL; in ixgbe_setup_ixfi_x550em()
1131 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
1138 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
1142 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN; in ixgbe_setup_ixfi_x550em()
1143 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN; in ixgbe_setup_ixfi_x550em()
1144 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN; in ixgbe_setup_ixfi_x550em()
1147 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
1153 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
1157 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN; in ixgbe_setup_ixfi_x550em()
1158 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN; in ixgbe_setup_ixfi_x550em()
1159 reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN; in ixgbe_setup_ixfi_x550em()
1162 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
1169 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
1173 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN; in ixgbe_setup_ixfi_x550em()
1174 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CZERO_EN; in ixgbe_setup_ixfi_x550em()
1175 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CPLUS1_OVRRD_EN; in ixgbe_setup_ixfi_x550em()
1176 reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CMINUS1_OVRRD_EN; in ixgbe_setup_ixfi_x550em()
1179 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
1186 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_ixfi_x550em()
1190 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART; in ixgbe_setup_ixfi_x550em()
1193 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
1637 u32 reg_val; in ixgbe_setup_kr_speed_x550em() local
1641 IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); in ixgbe_setup_kr_speed_x550em()
1645 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; in ixgbe_setup_kr_speed_x550em()
1646 reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ | in ixgbe_setup_kr_speed_x550em()
1648 reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR | in ixgbe_setup_kr_speed_x550em()
1653 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR; in ixgbe_setup_kr_speed_x550em()
1657 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX; in ixgbe_setup_kr_speed_x550em()
1660 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART; in ixgbe_setup_kr_speed_x550em()
1663 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_kr_speed_x550em()
1676 u32 reg_val; in ixgbe_setup_kx4_x550em() local
1680 hw->bus.lan_id, ®_val); in ixgbe_setup_kx4_x550em()
1684 reg_val &= ~(IXGBE_KX4_LINK_CNTL_1_TETH_AN_CAP_KX4 | in ixgbe_setup_kx4_x550em()
1687 reg_val |= IXGBE_KX4_LINK_CNTL_1_TETH_AN_ENABLE; in ixgbe_setup_kx4_x550em()
1691 reg_val |= IXGBE_KX4_LINK_CNTL_1_TETH_AN_CAP_KX4; in ixgbe_setup_kx4_x550em()
1695 reg_val |= IXGBE_KX4_LINK_CNTL_1_TETH_AN_CAP_KX; in ixgbe_setup_kx4_x550em()
1698 reg_val |= IXGBE_KX4_LINK_CNTL_1_TETH_AN_RESTART; in ixgbe_setup_kx4_x550em()
1701 hw->bus.lan_id, reg_val); in ixgbe_setup_kx4_x550em()