Lines Matching refs:MVPP2_PRS_LU_L2
583 MVPP2_PRS_LU_L2, enumerator
1576 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_dsa_tag_set()
1646 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_dsa_tag_ethertype_set()
1757 mvpp2_prs_sram_next_lu_set(pe, MVPP2_PRS_LU_L2); in mvpp2_prs_vlan_add()
2289 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2301 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2315 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2331 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2345 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2363 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2379 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2400 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2430 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2444 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2461 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2470 mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2487 mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); in mvpp2_prs_etype_init()
2544 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_vlan_init()
2564 mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_L2); in mvpp2_prs_vlan_init()