Lines Matching refs:MVPP2_PRS_PORT_MASK
435 #define MVPP2_PRS_PORT_MASK 0xff macro
1107 unsigned char port_mask = MVPP2_PRS_PORT_MASK; in mvpp2_prs_tcam_port_map_set()
1112 pe->tcam.byte[enable_off] |= ~ports & MVPP2_PRS_PORT_MASK; in mvpp2_prs_tcam_port_map_set()
1120 return ~(pe->tcam.byte[enable_off]) & MVPP2_PRS_PORT_MASK; in mvpp2_prs_tcam_port_map_get()
1604 port_mask = MVPP2_PRS_PORT_MASK; in mvpp2_prs_dsa_tag_ethertype_set()
1958 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip4_proto()
2028 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip4_cast()
2069 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip6_proto()
2109 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip6_cast()
2183 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_mh_init()
2209 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_mac_init()
2271 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_dsa_init()
2474 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_etype_init()
2517 MVPP2_PRS_PORT_MASK); in mvpp2_prs_vlan_init()
2523 MVPP2_PRS_PORT_MASK); in mvpp2_prs_vlan_init()
2529 MVPP2_PRS_PORT_MASK); in mvpp2_prs_vlan_init()
2535 MVPP2_PRS_PORT_MASK); in mvpp2_prs_vlan_init()
2553 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_vlan_init()
2569 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_vlan_init()
2743 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip4_init()
2763 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip4_init()
2856 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip6_init()
2876 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip6_init()
2898 mvpp2_prs_tcam_port_map_set(&pe, MVPP2_PRS_PORT_MASK); in mvpp2_prs_ip6_init()