Lines Matching refs:smsc9420_reg_read
100 static inline u32 smsc9420_reg_read(struct smsc9420_pdata *pd, u32 offset) in smsc9420_reg_read() function
114 smsc9420_reg_read(pd, ID_REV); in smsc9420_pci_flush_write()
127 if ((smsc9420_reg_read(pd, MII_ACCESS) & MII_ACCESS_MII_BUSY_)) { in smsc9420_mii_read()
139 if (!(smsc9420_reg_read(pd, MII_ACCESS) & in smsc9420_mii_read()
141 reg = (u16)smsc9420_reg_read(pd, MII_DATA); in smsc9420_mii_read()
165 if ((smsc9420_reg_read(pd, MII_ACCESS) & MII_ACCESS_MII_BUSY_)) { in smsc9420_mii_write()
180 if (!(smsc9420_reg_read(pd, MII_ACCESS) & in smsc9420_mii_write()
209 if (smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_) { in smsc9420_eeprom_reload()
219 if (!(smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_)) in smsc9420_eeprom_reload()
310 regs->version = smsc9420_reg_read(pd, ID_REV); in smsc9420_ethtool_getregs()
312 data[j++] = smsc9420_reg_read(pd, i); in smsc9420_ethtool_getregs()
324 unsigned int temp = smsc9420_reg_read(pd, GPIO_CFG); in smsc9420_eeprom_enable_access()
336 if (smsc9420_reg_read(pd, E2P_CMD) & E2P_CMD_EPC_BUSY_) { in smsc9420_eeprom_send_cmd()
346 e2cmd = smsc9420_reg_read(pd, E2P_CMD); in smsc9420_eeprom_send_cmd()
373 data[address] = smsc9420_reg_read(pd, E2P_DATA); in smsc9420_eeprom_read_location()
486 u32 mac_high16 = smsc9420_reg_read(pd, ADDRH); in smsc9420_check_mac_address()
487 u32 mac_low32 = smsc9420_reg_read(pd, ADDRL); in smsc9420_check_mac_address()
515 dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL); in smsc9420_stop_tx()
521 if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_TS_) in smsc9420_stop_tx()
533 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA); in smsc9420_stop_tx()
539 mac_cr = smsc9420_reg_read(pd, MAC_CR) & (~MAC_CR_TXEN_); in smsc9420_stop_tx()
614 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA); in smsc9420_stop_rx()
620 mac_cr = smsc9420_reg_read(pd, MAC_CR) & (~MAC_CR_RXEN_); in smsc9420_stop_rx()
625 dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL); in smsc9420_stop_rx()
632 if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_RS_) in smsc9420_stop_rx()
655 int_cfg = smsc9420_reg_read(pd, INT_CFG); in smsc9420_isr()
662 int_sts = smsc9420_reg_read(pd, INT_STAT); in smsc9420_isr()
665 u32 status = smsc9420_reg_read(pd, DMAC_STATUS); in smsc9420_isr()
675 u32 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA); in smsc9420_isr()
693 int_ctl = smsc9420_reg_read(pd, INT_CTL); in smsc9420_isr()
726 smsc9420_reg_read(pd, BUS_MODE); in smsc9420_dmac_soft_reset()
728 if (smsc9420_reg_read(pd, BUS_MODE) & BUS_MODE_SWR_) in smsc9420_dmac_soft_reset()
743 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_); in smsc9420_stop()
893 drop_frame_cnt = smsc9420_reg_read(pd, MISS_FRAME_CNTR); in smsc9420_rx_poll()
905 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA); in smsc9420_rx_poll()
1038 u32 counter = smsc9420_reg_read(pd, MISS_FRAME_CNTR); in smsc9420_get_stats()
1047 u32 mac_cr = smsc9420_reg_read(pd, MAC_CR); in smsc9420_set_multicast_list()
1129 u32 mac_cr = smsc9420_reg_read(pd, MAC_CR); in smsc9420_phy_adjust_link()
1305 smsc9420_reg_read(pd, VLAN1)); in smsc9420_alloc_rx_ring()
1309 u32 coe = smsc9420_reg_read(pd, COE_CR) | RX_COE_EN; in smsc9420_alloc_rx_ring()
1344 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_); in smsc9420_open()
1394 int_cfg = smsc9420_reg_read(pd, INT_CFG) | INT_CFG_IRQ_EN_; in smsc9420_open()
1400 int_ctl = smsc9420_reg_read(pd, INT_CTL) | INT_CTL_SW_INT_EN_; in smsc9420_open()
1414 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_); in smsc9420_open()
1455 mac_cr = smsc9420_reg_read(pd, MAC_CR) | MAC_CR_TXEN_ | MAC_CR_RXEN_; in smsc9420_open()
1458 dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL); in smsc9420_open()
1463 dma_intr_ena = smsc9420_reg_read(pd, DMAC_INTR_ENA); in smsc9420_open()
1475 int_cfg = smsc9420_reg_read(pd, INT_CFG) | INT_CFG_IRQ_EN_; in smsc9420_open()
1502 int_cfg = smsc9420_reg_read(pd, INT_CFG) & (~INT_CFG_IRQ_EN_); in smsc9420_suspend()
1647 id_rev = smsc9420_reg_read(pd, ID_REV); in smsc9420_probe()