Lines Matching refs:tlan_mii_write_reg
205 static void tlan_mii_write_reg(struct net_device *, u16, u16, u16);
980 tlan_mii_write_reg(dev, data->phy_id & 0x1f, in tlan_ioctl()
1737 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, in tlan_handle_status_check()
1742 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, in tlan_handle_status_check()
2332 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); in tlan_finish_reset()
2529 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value); in tlan_phy_power_down()
2535 tlan_mii_write_reg(dev, priv->phy[1], MII_GEN_CTL, value); in tlan_phy_power_down()
2557 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value); in tlan_phy_power_up()
2582 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, value); in tlan_phy_reset()
2622 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0000); in tlan_phy_start_link()
2626 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0100); in tlan_phy_start_link()
2629 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2000); in tlan_phy_start_link()
2633 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2100); in tlan_phy_start_link()
2637 tlan_mii_write_reg(dev, phy, MII_AN_ADV, in tlan_phy_start_link()
2640 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1000); in tlan_phy_start_link()
2642 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1200); in tlan_phy_start_link()
2676 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, control); in tlan_phy_start_link()
2677 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tctl); in tlan_phy_start_link()
2734 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, in tlan_phy_finish_auto_neg()
2738 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, in tlan_phy_finish_auto_neg()
2793 tlan_mii_write_reg(dev, priv->phy[0], in tlan_phy_monitor()
3026 tlan_mii_write_reg(struct net_device *dev, u16 phy, u16 reg, u16 val) in tlan_mii_write_reg() function