200 static inline void irda_write(struct au1k_private *p, unsigned long ofs,  in irda_write()  function
289 	irda_write(aup, IR_STATUS, irda_read(aup, IR_STATUS) & ~IR_PHYEN);  in au1k_irda_set_speed()
292 	irda_write(aup, IR_CONFIG_1,  in au1k_irda_set_speed()
305 	irda_write(aup, IR_CONFIG_1,  in au1k_irda_set_speed()
332 		irda_write(aup, IR_WRITE_PHY_CONFIG, IR_BR(11) | IR_PW(12));  in au1k_irda_set_speed()
333 		irda_write(aup, IR_CONFIG_1, IR_SIR_MODE);  in au1k_irda_set_speed()
336 		irda_write(aup, IR_WRITE_PHY_CONFIG, IR_BR(5) | IR_PW(12));  in au1k_irda_set_speed()
337 		irda_write(aup, IR_CONFIG_1, IR_SIR_MODE);  in au1k_irda_set_speed()
340 		irda_write(aup, IR_WRITE_PHY_CONFIG, IR_BR(2) | IR_PW(12));  in au1k_irda_set_speed()
341 		irda_write(aup, IR_CONFIG_1, IR_SIR_MODE);  in au1k_irda_set_speed()
344 		irda_write(aup, IR_WRITE_PHY_CONFIG, IR_BR(1) | IR_PW(12));  in au1k_irda_set_speed()
345 		irda_write(aup, IR_CONFIG_1, IR_SIR_MODE);  in au1k_irda_set_speed()
348 		irda_write(aup, IR_WRITE_PHY_CONFIG, IR_PW(12));  in au1k_irda_set_speed()
349 		irda_write(aup, IR_CONFIG_1, IR_SIR_MODE);  in au1k_irda_set_speed()
352 		irda_write(aup, IR_WRITE_PHY_CONFIG, IR_P(15));  in au1k_irda_set_speed()
353 		irda_write(aup, IR_CONFIG_1, IR_FIR | IR_DMA_ENABLE |  in au1k_irda_set_speed()
363 	irda_write(aup, IR_STATUS, irda_read(aup, IR_STATUS) | IR_PHYEN);  in au1k_irda_set_speed()
366 	irda_write(aup, IR_RING_PROMPT, 0);  in au1k_irda_set_speed()
443 			irda_write(aup, IR_CONFIG_1,  in au1k_tx_ack()
445 			irda_write(aup, IR_CONFIG_1,  in au1k_tx_ack()
447 			irda_write(aup, IR_RING_PROMPT, 0);  in au1k_tx_ack()
490 		irda_write(aup, IR_RING_PROMPT, 0);  in au1k_irda_rx()
505 	irda_write(aup, IR_INT_CLEAR, 0); /* ack irda interrupts */  in au1k_irda_interrupt()
560 	irda_write(aup, IR_ENABLE, enable);  in au1k_init()
565 	irda_write(aup, IR_STATUS, irda_read(aup, IR_STATUS) & ~IR_PHYEN);  in au1k_init()
568 	irda_write(aup, IR_MAX_PKT_LEN, MAX_BUF_SIZE);  in au1k_init()
571 	irda_write(aup, IR_RING_BASE_ADDR_H, ring_address >> 26);  in au1k_init()
572 	irda_write(aup, IR_RING_BASE_ADDR_L, (ring_address >> 10) & 0xffff);  in au1k_init()
574 	irda_write(aup, IR_RING_SIZE,  in au1k_init()
577 	irda_write(aup, IR_CONFIG_2, phyck | IR_ONE_PIN);  in au1k_init()
578 	irda_write(aup, IR_RING_ADDR_CMPR, 0);  in au1k_init()
618 	irda_write(aup, IR_CONFIG_2, irda_read(aup, IR_CONFIG_2) | IR_IEN);  in au1k_irda_start()
635 	irda_write(aup, IR_CONFIG_2, irda_read(aup, IR_CONFIG_2) & ~IR_IEN);  in au1k_irda_stop()
636 	irda_write(aup, IR_CONFIG_1, 0);  in au1k_irda_stop()
637 	irda_write(aup, IR_ENABLE, 0); /* disable clock */  in au1k_irda_stop()
719 	irda_write(aup, IR_CONFIG_1,  in au1k_irda_hard_xmit()
721 	irda_write(aup, IR_RING_PROMPT, 0);  in au1k_irda_hard_xmit()