29 void *wcn36xx_dxe_get_next_bd(struct wcn36xx *wcn, bool is_low)  in wcn36xx_dxe_get_next_bd()  argument
32 		&wcn->dxe_tx_l_ch :  in wcn36xx_dxe_get_next_bd()
33 		&wcn->dxe_tx_h_ch;  in wcn36xx_dxe_get_next_bd()
38 static void wcn36xx_dxe_write_register(struct wcn36xx *wcn, int addr, int data)  in wcn36xx_dxe_write_register()  argument
44 	writel(data, wcn->mmio + addr);  in wcn36xx_dxe_write_register()
47 #define wcn36xx_dxe_write_register_x(wcn, reg, reg_data)		 \  argument
49 	if (wcn->chip_version == WCN36XX_CHIP_3680)			 \
50 		wcn36xx_dxe_write_register(wcn, reg ## _3680, reg_data); \
52 		wcn36xx_dxe_write_register(wcn, reg ## _3660, reg_data); \
55 static void wcn36xx_dxe_read_register(struct wcn36xx *wcn, int addr, int *data)  in wcn36xx_dxe_read_register()  argument
57 	*data = readl(wcn->mmio + addr);  in wcn36xx_dxe_read_register()
109 int wcn36xx_dxe_alloc_ctl_blks(struct wcn36xx *wcn)  in wcn36xx_dxe_alloc_ctl_blks()  argument
113 	wcn->dxe_tx_l_ch.ch_type = WCN36XX_DXE_CH_TX_L;  in wcn36xx_dxe_alloc_ctl_blks()
114 	wcn->dxe_tx_h_ch.ch_type = WCN36XX_DXE_CH_TX_H;  in wcn36xx_dxe_alloc_ctl_blks()
115 	wcn->dxe_rx_l_ch.ch_type = WCN36XX_DXE_CH_RX_L;  in wcn36xx_dxe_alloc_ctl_blks()
116 	wcn->dxe_rx_h_ch.ch_type = WCN36XX_DXE_CH_RX_H;  in wcn36xx_dxe_alloc_ctl_blks()
118 	wcn->dxe_tx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_L;  in wcn36xx_dxe_alloc_ctl_blks()
119 	wcn->dxe_tx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_H;  in wcn36xx_dxe_alloc_ctl_blks()
120 	wcn->dxe_rx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_L;  in wcn36xx_dxe_alloc_ctl_blks()
121 	wcn->dxe_rx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_H;  in wcn36xx_dxe_alloc_ctl_blks()
123 	wcn->dxe_tx_l_ch.dxe_wq =  WCN36XX_DXE_WQ_TX_L;  in wcn36xx_dxe_alloc_ctl_blks()
124 	wcn->dxe_tx_h_ch.dxe_wq =  WCN36XX_DXE_WQ_TX_H;  in wcn36xx_dxe_alloc_ctl_blks()
126 	wcn->dxe_tx_l_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_L_BD;  in wcn36xx_dxe_alloc_ctl_blks()
127 	wcn->dxe_tx_h_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_H_BD;  in wcn36xx_dxe_alloc_ctl_blks()
129 	wcn->dxe_tx_l_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_L_SKB;  in wcn36xx_dxe_alloc_ctl_blks()
130 	wcn->dxe_tx_h_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_H_SKB;  in wcn36xx_dxe_alloc_ctl_blks()
132 	wcn->dxe_tx_l_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_L;  in wcn36xx_dxe_alloc_ctl_blks()
133 	wcn->dxe_tx_h_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_H;  in wcn36xx_dxe_alloc_ctl_blks()
135 	wcn->dxe_tx_l_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_L;  in wcn36xx_dxe_alloc_ctl_blks()
136 	wcn->dxe_tx_h_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_H;  in wcn36xx_dxe_alloc_ctl_blks()
139 	ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_l_ch);  in wcn36xx_dxe_alloc_ctl_blks()
142 	ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_h_ch);  in wcn36xx_dxe_alloc_ctl_blks()
145 	ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_l_ch);  in wcn36xx_dxe_alloc_ctl_blks()
148 	ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_h_ch);  in wcn36xx_dxe_alloc_ctl_blks()
153 	ret = wcn->ctrl_ops->smsm_change_state(  in wcn36xx_dxe_alloc_ctl_blks()
161 	wcn36xx_dxe_free_ctl_blks(wcn);  in wcn36xx_dxe_alloc_ctl_blks()
165 void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn)  in wcn36xx_dxe_free_ctl_blks()  argument
167 	wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_l_ch);  in wcn36xx_dxe_free_ctl_blks()
168 	wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_h_ch);  in wcn36xx_dxe_free_ctl_blks()
169 	wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_l_ch);  in wcn36xx_dxe_free_ctl_blks()
170 	wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_h_ch);  in wcn36xx_dxe_free_ctl_blks()
258 static int wcn36xx_dxe_enable_ch_int(struct wcn36xx *wcn, u16 wcn_ch)  in wcn36xx_dxe_enable_ch_int()  argument
262 	wcn36xx_dxe_read_register(wcn,  in wcn36xx_dxe_enable_ch_int()
268 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_enable_ch_int()
292 static int wcn36xx_dxe_ch_alloc_skb(struct wcn36xx *wcn,  in wcn36xx_dxe_ch_alloc_skb()  argument
301 		wcn36xx_dxe_fill_skb(wcn->dev, cur_ctl);  in wcn36xx_dxe_ch_alloc_skb()
308 static void wcn36xx_dxe_ch_free_skbs(struct wcn36xx *wcn,  in wcn36xx_dxe_ch_free_skbs()  argument
320 void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status)  in wcn36xx_dxe_tx_ack_ind()  argument
326 	spin_lock_irqsave(&wcn->dxe_lock, flags);  in wcn36xx_dxe_tx_ack_ind()
327 	skb = wcn->tx_ack_skb;  in wcn36xx_dxe_tx_ack_ind()
328 	wcn->tx_ack_skb = NULL;  in wcn36xx_dxe_tx_ack_ind()
329 	spin_unlock_irqrestore(&wcn->dxe_lock, flags);  in wcn36xx_dxe_tx_ack_ind()
343 	ieee80211_tx_status_irqsafe(wcn->hw, skb);  in wcn36xx_dxe_tx_ack_ind()
344 	ieee80211_wake_queues(wcn->hw);  in wcn36xx_dxe_tx_ack_ind()
347 static void reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch)  in reap_tx_dxes()  argument
364 			dma_unmap_single(wcn->dev, ctl->desc->src_addr_l,  in reap_tx_dxes()
369 				ieee80211_free_txskb(wcn->hw, ctl->skb);  in reap_tx_dxes()
372 			if (wcn->queues_stopped) {  in reap_tx_dxes()
373 				wcn->queues_stopped = false;  in reap_tx_dxes()
374 				ieee80211_wake_queues(wcn->hw);  in reap_tx_dxes()
390 	struct wcn36xx *wcn = (struct wcn36xx *)dev;  in wcn36xx_irq_tx_complete()  local
393 	wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);  in wcn36xx_irq_tx_complete()
396 		wcn36xx_dxe_read_register(wcn,  in wcn36xx_irq_tx_complete()
402 		wcn36xx_dxe_write_register(wcn,  in wcn36xx_irq_tx_complete()
406 		wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_ED_CLR,  in wcn36xx_irq_tx_complete()
409 		reap_tx_dxes(wcn, &wcn->dxe_tx_h_ch);  in wcn36xx_irq_tx_complete()
413 		wcn36xx_dxe_read_register(wcn,  in wcn36xx_irq_tx_complete()
418 		wcn36xx_dxe_write_register(wcn,  in wcn36xx_irq_tx_complete()
422 		wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_ED_CLR,  in wcn36xx_irq_tx_complete()
425 		reap_tx_dxes(wcn, &wcn->dxe_tx_l_ch);  in wcn36xx_irq_tx_complete()
433 	struct wcn36xx *wcn = (struct wcn36xx *)dev;  in wcn36xx_irq_rx_ready()  local
435 	disable_irq_nosync(wcn->rx_irq);  in wcn36xx_irq_rx_ready()
436 	wcn36xx_dxe_rx_frame(wcn);  in wcn36xx_irq_rx_ready()
437 	enable_irq(wcn->rx_irq);  in wcn36xx_irq_rx_ready()
441 static int wcn36xx_dxe_request_irqs(struct wcn36xx *wcn)  in wcn36xx_dxe_request_irqs()  argument
445 	ret = request_irq(wcn->tx_irq, wcn36xx_irq_tx_complete,  in wcn36xx_dxe_request_irqs()
446 			  IRQF_TRIGGER_HIGH, "wcn36xx_tx", wcn);  in wcn36xx_dxe_request_irqs()
452 	ret = request_irq(wcn->rx_irq, wcn36xx_irq_rx_ready, IRQF_TRIGGER_HIGH,  in wcn36xx_dxe_request_irqs()
453 			  "wcn36xx_rx", wcn);  in wcn36xx_dxe_request_irqs()
459 	enable_irq_wake(wcn->rx_irq);  in wcn36xx_dxe_request_irqs()
464 	free_irq(wcn->tx_irq, wcn);  in wcn36xx_dxe_request_irqs()
470 static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn,  in wcn36xx_rx_handle_packets()  argument
481 		wcn36xx_dxe_fill_skb(wcn->dev, ctl);  in wcn36xx_rx_handle_packets()
486 			wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR,  in wcn36xx_rx_handle_packets()
491 			wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR,  in wcn36xx_rx_handle_packets()
498 		dma_unmap_single(wcn->dev, dma_addr, WCN36XX_PKT_SIZE,  in wcn36xx_rx_handle_packets()
500 		wcn36xx_rx_skb(wcn, skb);  in wcn36xx_rx_handle_packets()
510 void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn)  in wcn36xx_dxe_rx_frame()  argument
514 	wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);  in wcn36xx_dxe_rx_frame()
518 		wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,  in wcn36xx_dxe_rx_frame()
520 		wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_l_ch));  in wcn36xx_dxe_rx_frame()
526 		wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,  in wcn36xx_dxe_rx_frame()
528 		wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_h_ch));  in wcn36xx_dxe_rx_frame()
535 int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn)  in wcn36xx_dxe_allocate_mem_pools()  argument
543 	wcn->mgmt_mem_pool.chunk_size =	WCN36XX_BD_CHUNK_SIZE +  in wcn36xx_dxe_allocate_mem_pools()
546 	s = wcn->mgmt_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_H;  in wcn36xx_dxe_allocate_mem_pools()
547 	cpu_addr = dma_alloc_coherent(wcn->dev, s, &wcn->mgmt_mem_pool.phy_addr,  in wcn36xx_dxe_allocate_mem_pools()
552 	wcn->mgmt_mem_pool.virt_addr = cpu_addr;  in wcn36xx_dxe_allocate_mem_pools()
558 	wcn->data_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE +  in wcn36xx_dxe_allocate_mem_pools()
561 	s = wcn->data_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_L;  in wcn36xx_dxe_allocate_mem_pools()
562 	cpu_addr = dma_alloc_coherent(wcn->dev, s, &wcn->data_mem_pool.phy_addr,  in wcn36xx_dxe_allocate_mem_pools()
567 	wcn->data_mem_pool.virt_addr = cpu_addr;  in wcn36xx_dxe_allocate_mem_pools()
573 	wcn36xx_dxe_free_mem_pools(wcn);  in wcn36xx_dxe_allocate_mem_pools()
578 void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn)  in wcn36xx_dxe_free_mem_pools()  argument
580 	if (wcn->mgmt_mem_pool.virt_addr)  in wcn36xx_dxe_free_mem_pools()
581 		dma_free_coherent(wcn->dev, wcn->mgmt_mem_pool.chunk_size *  in wcn36xx_dxe_free_mem_pools()
583 				  wcn->mgmt_mem_pool.virt_addr,  in wcn36xx_dxe_free_mem_pools()
584 				  wcn->mgmt_mem_pool.phy_addr);  in wcn36xx_dxe_free_mem_pools()
586 	if (wcn->data_mem_pool.virt_addr) {  in wcn36xx_dxe_free_mem_pools()
587 		dma_free_coherent(wcn->dev, wcn->data_mem_pool.chunk_size *  in wcn36xx_dxe_free_mem_pools()
589 				  wcn->data_mem_pool.virt_addr,  in wcn36xx_dxe_free_mem_pools()
590 				  wcn->data_mem_pool.phy_addr);  in wcn36xx_dxe_free_mem_pools()
594 int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,  in wcn36xx_dxe_tx_frame()  argument
605 	ch = is_low ? &wcn->dxe_tx_l_ch : &wcn->dxe_tx_h_ch;  in wcn36xx_dxe_tx_frame()
618 		ieee80211_stop_queues(wcn->hw);  in wcn36xx_dxe_tx_frame()
619 		wcn->queues_stopped = true;  in wcn36xx_dxe_tx_frame()
654 	desc->src_addr_l = dma_map_single(wcn->dev,  in wcn36xx_dxe_tx_frame()
679 		wcn->ctrl_ops->smsm_change_state(  in wcn36xx_dxe_tx_frame()
686 		wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_tx_frame()
696 int wcn36xx_dxe_init(struct wcn36xx *wcn)  in wcn36xx_dxe_init()  argument
701 	wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);  in wcn36xx_dxe_init()
705 	wcn36xx_dxe_write_register_x(wcn, WCN36XX_DXE_REG_CCU_INT, reg_data);  in wcn36xx_dxe_init()
710 	wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_l_ch);  in wcn36xx_dxe_init()
711 	wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_l_ch, &wcn->data_mem_pool);  in wcn36xx_dxe_init()
714 	wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_L,  in wcn36xx_dxe_init()
715 		wcn->dxe_tx_l_ch.head_blk_ctl->desc_phy_addr);  in wcn36xx_dxe_init()
718 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
722 	wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, &reg_data);  in wcn36xx_dxe_init()
723 	wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L);  in wcn36xx_dxe_init()
728 	wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_h_ch);  in wcn36xx_dxe_init()
729 	wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_h_ch, &wcn->mgmt_mem_pool);  in wcn36xx_dxe_init()
732 	wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_H,  in wcn36xx_dxe_init()
733 		wcn->dxe_tx_h_ch.head_blk_ctl->desc_phy_addr);  in wcn36xx_dxe_init()
736 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
740 	wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, &reg_data);  in wcn36xx_dxe_init()
743 	wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H);  in wcn36xx_dxe_init()
748 	wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_l_ch);  in wcn36xx_dxe_init()
751 	wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch);  in wcn36xx_dxe_init()
754 	wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_L,  in wcn36xx_dxe_init()
755 		wcn->dxe_rx_l_ch.head_blk_ctl->desc_phy_addr);  in wcn36xx_dxe_init()
758 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
763 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
765 		wcn->dxe_rx_l_ch.head_blk_ctl->desc->phy_next_l);  in wcn36xx_dxe_init()
768 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
773 	wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L);  in wcn36xx_dxe_init()
778 	wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_h_ch);  in wcn36xx_dxe_init()
781 	wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_h_ch);  in wcn36xx_dxe_init()
784 	wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_H,  in wcn36xx_dxe_init()
785 		wcn->dxe_rx_h_ch.head_blk_ctl->desc_phy_addr);  in wcn36xx_dxe_init()
788 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
793 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
795 		 wcn->dxe_rx_h_ch.head_blk_ctl->desc->phy_next_l);  in wcn36xx_dxe_init()
798 	wcn36xx_dxe_write_register(wcn,  in wcn36xx_dxe_init()
803 	wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H);  in wcn36xx_dxe_init()
805 	ret = wcn36xx_dxe_request_irqs(wcn);  in wcn36xx_dxe_init()
815 void wcn36xx_dxe_deinit(struct wcn36xx *wcn)  in wcn36xx_dxe_deinit()  argument
817 	free_irq(wcn->tx_irq, wcn);  in wcn36xx_dxe_deinit()
818 	free_irq(wcn->rx_irq, wcn);  in wcn36xx_dxe_deinit()
820 	if (wcn->tx_ack_skb) {  in wcn36xx_dxe_deinit()
821 		ieee80211_tx_status_irqsafe(wcn->hw, wcn->tx_ack_skb);  in wcn36xx_dxe_deinit()
822 		wcn->tx_ack_skb = NULL;  in wcn36xx_dxe_deinit()
825 	wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_l_ch);  in wcn36xx_dxe_deinit()
826 	wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_h_ch);  in wcn36xx_dxe_deinit()