Lines Matching refs:val

24 field_valid(u8 val)  in field_valid()  argument
26 return val != 0xff; in field_valid()
30 field_validate(u8 val) in field_validate() argument
32 if (!field_valid(val)) in field_validate()
35 return val; in field_validate()
42 u32 val; in mt7601u_efuse_read() local
45 val = mt76_rr(dev, MT_EFUSE_CTRL); in mt7601u_efuse_read()
46 val &= ~(MT_EFUSE_CTRL_AIN | in mt7601u_efuse_read()
48 val |= MT76_SET(MT_EFUSE_CTRL_AIN, addr & ~0xf) | in mt7601u_efuse_read()
51 mt76_wr(dev, MT_EFUSE_CTRL, val); in mt7601u_efuse_read()
56 val = mt76_rr(dev, MT_EFUSE_CTRL); in mt7601u_efuse_read()
57 if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) { in mt7601u_efuse_read()
66 val = mt76_rr(dev, MT_EFUSE_DATA(i)); in mt7601u_efuse_read()
67 put_unaligned_le32(val, data + 4 * i); in mt7601u_efuse_read()
175 u32 i, val; in mt7601u_set_channel_power() local
178 val = mt7601u_rr(dev, MT_TX_ALC_CFG_0); in mt7601u_set_channel_power()
179 max_pwr = MT76_GET(MT_TX_ALC_CFG_0_LIMIT_0, val); in mt7601u_set_channel_power()
209 u8 val = eeprom[MT_EE_COUNTRY_REGION]; in mt7601u_set_country_reg() local
212 if (val < 8) in mt7601u_set_country_reg()
213 idx = val; in mt7601u_set_country_reg()
214 if (val > 31 && val < 33) in mt7601u_set_country_reg()
215 idx = val - 32 + 8; in mt7601u_set_country_reg()
220 val, chan_bounds[idx].start, in mt7601u_set_country_reg()
267 u32 val; in mt7601u_extra_power_over_mac() local
269 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8); in mt7601u_extra_power_over_mac()
270 val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8); in mt7601u_extra_power_over_mac()
271 mt7601u_wr(dev, MT_TX_PWR_CFG_7, val); in mt7601u_extra_power_over_mac()
273 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8); in mt7601u_extra_power_over_mac()
274 mt7601u_wr(dev, MT_TX_PWR_CFG_9, val); in mt7601u_extra_power_over_mac()
291 mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i) in mt7601u_save_power_rate() argument
297 mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff); in mt7601u_save_power_rate()
298 mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff); in mt7601u_save_power_rate()
303 mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff); in mt7601u_save_power_rate()
304 mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff); in mt7601u_save_power_rate()
307 mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff); in mt7601u_save_power_rate()
308 mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff); in mt7601u_save_power_rate()
309 mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff); in mt7601u_save_power_rate()
310 mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff); in mt7601u_save_power_rate()
313 mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff); in mt7601u_save_power_rate()
314 mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff); in mt7601u_save_power_rate()
320 get_delta(u8 val) in get_delta() argument
324 if (!field_valid(val) || !(val & BIT(7))) in get_delta()
327 ret = val & 0x1f; in get_delta()
330 if (val & BIT(6)) in get_delta()
339 u32 val; in mt7601u_config_tx_power_per_rate() local
346 val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i)); in mt7601u_config_tx_power_per_rate()
348 mt7601u_save_power_rate(dev, bw40_delta, val, i); in mt7601u_config_tx_power_per_rate()
350 if (~val) in mt7601u_config_tx_power_per_rate()
351 mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val); in mt7601u_config_tx_power_per_rate()