Lines Matching refs:priv
72 static int rtl8xxxu_submit_rx_urb(struct rtl8xxxu_priv *priv,
971 static u8 rtl8xxxu_read8(struct rtl8xxxu_priv *priv, u16 addr) in rtl8xxxu_read8() argument
973 struct usb_device *udev = priv->udev; in rtl8xxxu_read8()
977 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_read8()
980 addr, 0, &priv->usb_buf.val8, sizeof(u8), in rtl8xxxu_read8()
982 data = priv->usb_buf.val8; in rtl8xxxu_read8()
983 mutex_unlock(&priv->usb_buf_mutex); in rtl8xxxu_read8()
991 static u16 rtl8xxxu_read16(struct rtl8xxxu_priv *priv, u16 addr) in rtl8xxxu_read16() argument
993 struct usb_device *udev = priv->udev; in rtl8xxxu_read16()
997 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_read16()
1000 addr, 0, &priv->usb_buf.val16, sizeof(u16), in rtl8xxxu_read16()
1002 data = le16_to_cpu(priv->usb_buf.val16); in rtl8xxxu_read16()
1003 mutex_unlock(&priv->usb_buf_mutex); in rtl8xxxu_read16()
1011 static u32 rtl8xxxu_read32(struct rtl8xxxu_priv *priv, u16 addr) in rtl8xxxu_read32() argument
1013 struct usb_device *udev = priv->udev; in rtl8xxxu_read32()
1017 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_read32()
1020 addr, 0, &priv->usb_buf.val32, sizeof(u32), in rtl8xxxu_read32()
1022 data = le32_to_cpu(priv->usb_buf.val32); in rtl8xxxu_read32()
1023 mutex_unlock(&priv->usb_buf_mutex); in rtl8xxxu_read32()
1031 static int rtl8xxxu_write8(struct rtl8xxxu_priv *priv, u16 addr, u8 val) in rtl8xxxu_write8() argument
1033 struct usb_device *udev = priv->udev; in rtl8xxxu_write8()
1036 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_write8()
1037 priv->usb_buf.val8 = val; in rtl8xxxu_write8()
1040 addr, 0, &priv->usb_buf.val8, sizeof(u8), in rtl8xxxu_write8()
1043 mutex_unlock(&priv->usb_buf_mutex); in rtl8xxxu_write8()
1051 static int rtl8xxxu_write16(struct rtl8xxxu_priv *priv, u16 addr, u16 val) in rtl8xxxu_write16() argument
1053 struct usb_device *udev = priv->udev; in rtl8xxxu_write16()
1056 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_write16()
1057 priv->usb_buf.val16 = cpu_to_le16(val); in rtl8xxxu_write16()
1060 addr, 0, &priv->usb_buf.val16, sizeof(u16), in rtl8xxxu_write16()
1062 mutex_unlock(&priv->usb_buf_mutex); in rtl8xxxu_write16()
1070 static int rtl8xxxu_write32(struct rtl8xxxu_priv *priv, u16 addr, u32 val) in rtl8xxxu_write32() argument
1072 struct usb_device *udev = priv->udev; in rtl8xxxu_write32()
1075 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_write32()
1076 priv->usb_buf.val32 = cpu_to_le32(val); in rtl8xxxu_write32()
1079 addr, 0, &priv->usb_buf.val32, sizeof(u32), in rtl8xxxu_write32()
1081 mutex_unlock(&priv->usb_buf_mutex); in rtl8xxxu_write32()
1090 rtl8xxxu_writeN(struct rtl8xxxu_priv *priv, u16 addr, u8 *buf, u16 len) in rtl8xxxu_writeN() argument
1092 struct usb_device *udev = priv->udev; in rtl8xxxu_writeN()
1093 int blocksize = priv->fops->writeN_block_size; in rtl8xxxu_writeN()
1129 static u32 rtl8xxxu_read_rfreg(struct rtl8xxxu_priv *priv, in rtl8xxxu_read_rfreg() argument
1134 hssia = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2); in rtl8xxxu_read_rfreg()
1136 val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm2); in rtl8xxxu_read_rfreg()
1144 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM2, hssia); in rtl8xxxu_read_rfreg()
1148 rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].hssiparm2, val32); in rtl8xxxu_read_rfreg()
1152 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM2, hssia); in rtl8xxxu_read_rfreg()
1155 val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm1); in rtl8xxxu_read_rfreg()
1157 retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hspiread); in rtl8xxxu_read_rfreg()
1159 retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].lssiread); in rtl8xxxu_read_rfreg()
1164 dev_info(&priv->udev->dev, "%s(%02x) = 0x%06x\n", in rtl8xxxu_read_rfreg()
1169 static int rtl8xxxu_write_rfreg(struct rtl8xxxu_priv *priv, in rtl8xxxu_write_rfreg() argument
1176 dev_info(&priv->udev->dev, "%s(%02x) = 0x%06x\n", in rtl8xxxu_write_rfreg()
1183 ret = rtl8xxxu_write32(priv, rtl8xxxu_rfregs[path].lssiparm, dataaddr); in rtl8xxxu_write_rfreg()
1194 static int rtl8723a_h2c_cmd(struct rtl8xxxu_priv *priv, struct h2c_cmd *h2c) in rtl8723a_h2c_cmd() argument
1196 struct device *dev = &priv->udev->dev; in rtl8723a_h2c_cmd()
1201 mutex_lock(&priv->h2c_mutex); in rtl8723a_h2c_cmd()
1203 mbox_nr = priv->next_mbox; in rtl8723a_h2c_cmd()
1212 val8 = rtl8xxxu_read8(priv, REG_HMTFR); in rtl8723a_h2c_cmd()
1227 rtl8xxxu_write16(priv, mbox_ext_reg, in rtl8723a_h2c_cmd()
1233 rtl8xxxu_write32(priv, mbox_reg, le32_to_cpu(h2c->raw.data)); in rtl8723a_h2c_cmd()
1237 priv->next_mbox = (mbox_nr + 1) % H2C_MAX_MBOX; in rtl8723a_h2c_cmd()
1240 mutex_unlock(&priv->h2c_mutex); in rtl8723a_h2c_cmd()
1244 static void rtl8723a_enable_rf(struct rtl8xxxu_priv *priv) in rtl8723a_enable_rf() argument
1249 val8 = rtl8xxxu_read8(priv, REG_SPS0_CTRL); in rtl8723a_enable_rf()
1251 rtl8xxxu_write8(priv, REG_SPS0_CTRL, val8); in rtl8723a_enable_rf()
1253 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XAB_RF_PARM); in rtl8723a_enable_rf()
1256 if (priv->rf_paths == 2) { in rtl8723a_enable_rf()
1260 rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_PARM, val32); in rtl8723a_enable_rf()
1262 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8723a_enable_rf()
1264 if (priv->tx_paths == 2) in rtl8723a_enable_rf()
1266 else if (priv->rtlchip == 0x8192c || priv->rtlchip == 0x8191c) in rtl8723a_enable_rf()
1270 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8723a_enable_rf()
1272 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8723a_enable_rf()
1274 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8723a_enable_rf()
1276 if (priv->rf_paths == 2) in rtl8723a_enable_rf()
1277 rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, 0x63db25a0); in rtl8723a_enable_rf()
1279 rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, 0x631b25a0); in rtl8723a_enable_rf()
1281 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0x32d95); in rtl8723a_enable_rf()
1282 if (priv->rf_paths == 2) in rtl8723a_enable_rf()
1283 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_AC, 0x32d95); in rtl8723a_enable_rf()
1285 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8723a_enable_rf()
1288 static void rtl8723a_disable_rf(struct rtl8xxxu_priv *priv) in rtl8723a_disable_rf() argument
1293 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8723a_disable_rf()
1295 sps0 = rtl8xxxu_read8(priv, REG_SPS0_CTRL); in rtl8723a_disable_rf()
1298 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XAB_RF_PARM); in rtl8723a_disable_rf()
1300 if (priv->rf_paths == 2) in rtl8723a_disable_rf()
1302 rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_PARM, val32); in rtl8723a_disable_rf()
1305 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8723a_disable_rf()
1307 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8723a_disable_rf()
1310 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8723a_disable_rf()
1312 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8723a_disable_rf()
1315 if (priv->rf_paths == 2) in rtl8723a_disable_rf()
1316 rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, 0x00db25a0); in rtl8723a_disable_rf()
1318 rtl8xxxu_write32(priv, REG_RX_WAIT_CCA, 0x001b25a0); in rtl8723a_disable_rf()
1321 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, 0); in rtl8723a_disable_rf()
1322 if (priv->rf_paths == 2) in rtl8723a_disable_rf()
1323 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_AC, 0); in rtl8723a_disable_rf()
1326 rtl8xxxu_write8(priv, REG_SPS0_CTRL, sps0); in rtl8723a_disable_rf()
1330 static void rtl8723a_stop_tx_beacon(struct rtl8xxxu_priv *priv) in rtl8723a_stop_tx_beacon() argument
1334 val8 = rtl8xxxu_read8(priv, REG_FWHW_TXQ_CTRL + 2); in rtl8723a_stop_tx_beacon()
1336 rtl8xxxu_write8(priv, REG_FWHW_TXQ_CTRL + 2, val8); in rtl8723a_stop_tx_beacon()
1338 rtl8xxxu_write8(priv, REG_TBTT_PROHIBIT + 1, 0x64); in rtl8723a_stop_tx_beacon()
1339 val8 = rtl8xxxu_read8(priv, REG_TBTT_PROHIBIT + 2); in rtl8723a_stop_tx_beacon()
1341 rtl8xxxu_write8(priv, REG_TBTT_PROHIBIT + 2, val8); in rtl8723a_stop_tx_beacon()
1370 struct rtl8xxxu_priv *priv = hw->priv; in rtl8723au_config_channel() local
1377 opmode = rtl8xxxu_read8(priv, REG_BW_OPMODE); in rtl8723au_config_channel()
1378 rsr = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET); in rtl8723au_config_channel()
1386 rtl8xxxu_write8(priv, REG_BW_OPMODE, opmode); in rtl8723au_config_channel()
1388 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8723au_config_channel()
1390 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8723au_config_channel()
1392 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8723au_config_channel()
1394 rtl8xxxu_write32(priv, REG_FPGA1_RF_MODE, val32); in rtl8723au_config_channel()
1396 val32 = rtl8xxxu_read32(priv, REG_FPGA0_ANALOG2); in rtl8723au_config_channel()
1398 rtl8xxxu_write32(priv, REG_FPGA0_ANALOG2, val32); in rtl8723au_config_channel()
1411 rtl8xxxu_write8(priv, REG_BW_OPMODE, opmode); in rtl8723au_config_channel()
1417 rtl8xxxu_write32(priv, REG_RESPONSE_RATE_SET, rsr); in rtl8723au_config_channel()
1419 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8723au_config_channel()
1421 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8723au_config_channel()
1423 val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE); in rtl8723au_config_channel()
1425 rtl8xxxu_write32(priv, REG_FPGA1_RF_MODE, val32); in rtl8723au_config_channel()
1431 val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM); in rtl8723au_config_channel()
1435 rtl8xxxu_write32(priv, REG_CCK0_SYSTEM, val32); in rtl8723au_config_channel()
1437 val32 = rtl8xxxu_read32(priv, REG_OFDM1_LSTF); in rtl8723au_config_channel()
1443 rtl8xxxu_write32(priv, REG_OFDM1_LSTF, val32); in rtl8723au_config_channel()
1445 val32 = rtl8xxxu_read32(priv, REG_FPGA0_ANALOG2); in rtl8723au_config_channel()
1447 rtl8xxxu_write32(priv, REG_FPGA0_ANALOG2, val32); in rtl8723au_config_channel()
1449 val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE); in rtl8723au_config_channel()
1455 rtl8xxxu_write32(priv, REG_FPGA0_POWER_SAVE, val32); in rtl8723au_config_channel()
1462 for (i = RF_A; i < priv->rf_paths; i++) { in rtl8723au_config_channel()
1463 val32 = rtl8xxxu_read_rfreg(priv, i, RF6052_REG_MODE_AG); in rtl8723au_config_channel()
1466 rtl8xxxu_write_rfreg(priv, i, RF6052_REG_MODE_AG, val32); in rtl8723au_config_channel()
1474 rtl8xxxu_write8(priv, REG_SIFS_CCK + 1, val8); in rtl8723au_config_channel()
1475 rtl8xxxu_write8(priv, REG_SIFS_OFDM + 1, val8); in rtl8723au_config_channel()
1477 rtl8xxxu_write16(priv, REG_R2T_SIFS, 0x0808); in rtl8723au_config_channel()
1478 rtl8xxxu_write16(priv, REG_T2T_SIFS, 0x0a0a); in rtl8723au_config_channel()
1480 for (i = RF_A; i < priv->rf_paths; i++) { in rtl8723au_config_channel()
1481 val32 = rtl8xxxu_read_rfreg(priv, i, RF6052_REG_MODE_AG); in rtl8723au_config_channel()
1486 rtl8xxxu_write_rfreg(priv, i, RF6052_REG_MODE_AG, val32); in rtl8723au_config_channel()
1491 rtl8723a_set_tx_power(struct rtl8xxxu_priv *priv, int channel, bool ht40) in rtl8723a_set_tx_power() argument
1501 cck[0] = priv->cck_tx_power_index_A[group]; in rtl8723a_set_tx_power()
1502 cck[1] = priv->cck_tx_power_index_B[group]; in rtl8723a_set_tx_power()
1504 ofdm[0] = priv->ht40_1s_tx_power_index_A[group]; in rtl8723a_set_tx_power()
1505 ofdm[1] = priv->ht40_1s_tx_power_index_B[group]; in rtl8723a_set_tx_power()
1507 ofdmbase[0] = ofdm[0] + priv->ofdm_tx_power_index_diff[group].a; in rtl8723a_set_tx_power()
1508 ofdmbase[1] = ofdm[1] + priv->ofdm_tx_power_index_diff[group].b; in rtl8723a_set_tx_power()
1513 mcsbase[0] += priv->ht20_tx_power_index_diff[group].a; in rtl8723a_set_tx_power()
1514 mcsbase[1] += priv->ht20_tx_power_index_diff[group].b; in rtl8723a_set_tx_power()
1517 if (priv->tx_paths > 1) { in rtl8723a_set_tx_power()
1518 if (ofdm[0] > priv->ht40_2s_tx_power_index_diff[group].a) in rtl8723a_set_tx_power()
1519 ofdm[0] -= priv->ht40_2s_tx_power_index_diff[group].a; in rtl8723a_set_tx_power()
1520 if (ofdm[1] > priv->ht40_2s_tx_power_index_diff[group].b) in rtl8723a_set_tx_power()
1521 ofdm[1] -= priv->ht40_2s_tx_power_index_diff[group].b; in rtl8723a_set_tx_power()
1525 dev_info(&priv->udev->dev, in rtl8723a_set_tx_power()
1537 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32); in rtl8723a_set_tx_power()
1540 rtl8xxxu_write32(priv, REG_TX_AGC_A_CCK1_MCS32, val32); in rtl8723a_set_tx_power()
1542 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11); in rtl8723a_set_tx_power()
1545 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32); in rtl8723a_set_tx_power()
1547 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11); in rtl8723a_set_tx_power()
1550 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11, val32); in rtl8723a_set_tx_power()
1552 val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK1_55_MCS32); in rtl8723a_set_tx_power()
1555 rtl8xxxu_write32(priv, REG_TX_AGC_B_CCK1_55_MCS32, val32); in rtl8723a_set_tx_power()
1561 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE18_06, ofdm_a); in rtl8723a_set_tx_power()
1562 rtl8xxxu_write32(priv, REG_TX_AGC_B_RATE18_06, ofdm_b); in rtl8723a_set_tx_power()
1564 rtl8xxxu_write32(priv, REG_TX_AGC_A_RATE54_24, ofdm_a); in rtl8723a_set_tx_power()
1565 rtl8xxxu_write32(priv, REG_TX_AGC_B_RATE54_24, ofdm_b); in rtl8723a_set_tx_power()
1572 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS03_MCS00, mcs_a); in rtl8723a_set_tx_power()
1573 rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS03_MCS00, mcs_b); in rtl8723a_set_tx_power()
1575 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS07_MCS04, mcs_a); in rtl8723a_set_tx_power()
1576 rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS07_MCS04, mcs_b); in rtl8723a_set_tx_power()
1578 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS11_MCS08, mcs_a); in rtl8723a_set_tx_power()
1579 rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS11_MCS08, mcs_b); in rtl8723a_set_tx_power()
1581 rtl8xxxu_write32(priv, REG_TX_AGC_A_MCS15_MCS12, mcs_a); in rtl8723a_set_tx_power()
1587 rtl8xxxu_write8(priv, REG_OFDM0_XC_TX_IQ_IMBALANCE + i, val8); in rtl8723a_set_tx_power()
1589 rtl8xxxu_write32(priv, REG_TX_AGC_B_MCS15_MCS12, mcs_b); in rtl8723a_set_tx_power()
1595 rtl8xxxu_write8(priv, REG_OFDM0_XD_TX_IQ_IMBALANCE + i, val8); in rtl8723a_set_tx_power()
1599 static void rtl8xxxu_set_linktype(struct rtl8xxxu_priv *priv, in rtl8xxxu_set_linktype() argument
1604 val8 = rtl8xxxu_read16(priv, REG_MSR); in rtl8xxxu_set_linktype()
1624 rtl8xxxu_write8(priv, REG_MSR, val8); in rtl8xxxu_set_linktype()
1630 rtl8xxxu_set_retry(struct rtl8xxxu_priv *priv, u16 short_retry, u16 long_retry) in rtl8xxxu_set_retry() argument
1639 rtl8xxxu_write16(priv, REG_RETRY_LIMIT, val16); in rtl8xxxu_set_retry()
1643 rtl8xxxu_set_spec_sifs(struct rtl8xxxu_priv *priv, u16 cck, u16 ofdm) in rtl8xxxu_set_spec_sifs() argument
1650 rtl8xxxu_write16(priv, REG_SPEC_SIFS, val16); in rtl8xxxu_set_spec_sifs()
1653 static void rtl8xxxu_print_chipinfo(struct rtl8xxxu_priv *priv) in rtl8xxxu_print_chipinfo() argument
1655 struct device *dev = &priv->udev->dev; in rtl8xxxu_print_chipinfo()
1658 switch (priv->chip_cut) { in rtl8xxxu_print_chipinfo()
1671 priv->chip_name, cut, priv->vendor_umc ? "UMC" : "TSMC", in rtl8xxxu_print_chipinfo()
1672 priv->tx_paths, priv->rx_paths, priv->ep_tx_count, in rtl8xxxu_print_chipinfo()
1673 priv->has_wifi, priv->has_bluetooth, priv->has_gps, in rtl8xxxu_print_chipinfo()
1674 priv->hi_pa); in rtl8xxxu_print_chipinfo()
1676 dev_info(dev, "RTL%s MAC: %pM\n", priv->chip_name, priv->mac_addr); in rtl8xxxu_print_chipinfo()
1679 static int rtl8xxxu_identify_chip(struct rtl8xxxu_priv *priv) in rtl8xxxu_identify_chip() argument
1681 struct device *dev = &priv->udev->dev; in rtl8xxxu_identify_chip()
1685 val32 = rtl8xxxu_read32(priv, REG_SYS_CFG); in rtl8xxxu_identify_chip()
1686 priv->chip_cut = (val32 & SYS_CFG_CHIP_VERSION_MASK) >> in rtl8xxxu_identify_chip()
1694 sprintf(priv->chip_name, "8723AU"); in rtl8xxxu_identify_chip()
1695 priv->rf_paths = 1; in rtl8xxxu_identify_chip()
1696 priv->rx_paths = 1; in rtl8xxxu_identify_chip()
1697 priv->tx_paths = 1; in rtl8xxxu_identify_chip()
1698 priv->rtlchip = 0x8723a; in rtl8xxxu_identify_chip()
1700 val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL); in rtl8xxxu_identify_chip()
1702 priv->has_wifi = 1; in rtl8xxxu_identify_chip()
1704 priv->has_bluetooth = 1; in rtl8xxxu_identify_chip()
1706 priv->has_gps = 1; in rtl8xxxu_identify_chip()
1708 bonding = rtl8xxxu_read32(priv, REG_HPON_FSM); in rtl8xxxu_identify_chip()
1711 sprintf(priv->chip_name, "8191CU"); in rtl8xxxu_identify_chip()
1712 priv->rf_paths = 2; in rtl8xxxu_identify_chip()
1713 priv->rx_paths = 2; in rtl8xxxu_identify_chip()
1714 priv->tx_paths = 1; in rtl8xxxu_identify_chip()
1715 priv->rtlchip = 0x8191c; in rtl8xxxu_identify_chip()
1717 sprintf(priv->chip_name, "8192CU"); in rtl8xxxu_identify_chip()
1718 priv->rf_paths = 2; in rtl8xxxu_identify_chip()
1719 priv->rx_paths = 2; in rtl8xxxu_identify_chip()
1720 priv->tx_paths = 2; in rtl8xxxu_identify_chip()
1721 priv->rtlchip = 0x8192c; in rtl8xxxu_identify_chip()
1723 priv->has_wifi = 1; in rtl8xxxu_identify_chip()
1725 sprintf(priv->chip_name, "8188CU"); in rtl8xxxu_identify_chip()
1726 priv->rf_paths = 1; in rtl8xxxu_identify_chip()
1727 priv->rx_paths = 1; in rtl8xxxu_identify_chip()
1728 priv->tx_paths = 1; in rtl8xxxu_identify_chip()
1729 priv->rtlchip = 0x8188c; in rtl8xxxu_identify_chip()
1730 priv->has_wifi = 1; in rtl8xxxu_identify_chip()
1734 priv->vendor_umc = 1; in rtl8xxxu_identify_chip()
1736 val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS); in rtl8xxxu_identify_chip()
1737 priv->rom_rev = (val32 & GPIO_RF_RL_ID) >> 28; in rtl8xxxu_identify_chip()
1739 val16 = rtl8xxxu_read16(priv, REG_NORMAL_SIE_EP_TX); in rtl8xxxu_identify_chip()
1741 priv->ep_tx_high_queue = 1; in rtl8xxxu_identify_chip()
1742 priv->ep_tx_count++; in rtl8xxxu_identify_chip()
1746 priv->ep_tx_normal_queue = 1; in rtl8xxxu_identify_chip()
1747 priv->ep_tx_count++; in rtl8xxxu_identify_chip()
1751 priv->ep_tx_low_queue = 1; in rtl8xxxu_identify_chip()
1752 priv->ep_tx_count++; in rtl8xxxu_identify_chip()
1758 if (!priv->ep_tx_count) { in rtl8xxxu_identify_chip()
1759 switch (priv->nr_out_eps) { in rtl8xxxu_identify_chip()
1761 priv->ep_tx_low_queue = 1; in rtl8xxxu_identify_chip()
1762 priv->ep_tx_count++; in rtl8xxxu_identify_chip()
1764 priv->ep_tx_normal_queue = 1; in rtl8xxxu_identify_chip()
1765 priv->ep_tx_count++; in rtl8xxxu_identify_chip()
1767 priv->ep_tx_high_queue = 1; in rtl8xxxu_identify_chip()
1768 priv->ep_tx_count++; in rtl8xxxu_identify_chip()
1779 static int rtl8723au_parse_efuse(struct rtl8xxxu_priv *priv) in rtl8723au_parse_efuse() argument
1781 if (priv->efuse_wifi.efuse8723.rtl_id != cpu_to_le16(0x8129)) in rtl8723au_parse_efuse()
1784 ether_addr_copy(priv->mac_addr, priv->efuse_wifi.efuse8723.mac_addr); in rtl8723au_parse_efuse()
1786 memcpy(priv->cck_tx_power_index_A, in rtl8723au_parse_efuse()
1787 priv->efuse_wifi.efuse8723.cck_tx_power_index_A, in rtl8723au_parse_efuse()
1788 sizeof(priv->cck_tx_power_index_A)); in rtl8723au_parse_efuse()
1789 memcpy(priv->cck_tx_power_index_B, in rtl8723au_parse_efuse()
1790 priv->efuse_wifi.efuse8723.cck_tx_power_index_B, in rtl8723au_parse_efuse()
1791 sizeof(priv->cck_tx_power_index_B)); in rtl8723au_parse_efuse()
1793 memcpy(priv->ht40_1s_tx_power_index_A, in rtl8723au_parse_efuse()
1794 priv->efuse_wifi.efuse8723.ht40_1s_tx_power_index_A, in rtl8723au_parse_efuse()
1795 sizeof(priv->ht40_1s_tx_power_index_A)); in rtl8723au_parse_efuse()
1796 memcpy(priv->ht40_1s_tx_power_index_B, in rtl8723au_parse_efuse()
1797 priv->efuse_wifi.efuse8723.ht40_1s_tx_power_index_B, in rtl8723au_parse_efuse()
1798 sizeof(priv->ht40_1s_tx_power_index_B)); in rtl8723au_parse_efuse()
1800 memcpy(priv->ht20_tx_power_index_diff, in rtl8723au_parse_efuse()
1801 priv->efuse_wifi.efuse8723.ht20_tx_power_index_diff, in rtl8723au_parse_efuse()
1802 sizeof(priv->ht20_tx_power_index_diff)); in rtl8723au_parse_efuse()
1803 memcpy(priv->ofdm_tx_power_index_diff, in rtl8723au_parse_efuse()
1804 priv->efuse_wifi.efuse8723.ofdm_tx_power_index_diff, in rtl8723au_parse_efuse()
1805 sizeof(priv->ofdm_tx_power_index_diff)); in rtl8723au_parse_efuse()
1807 memcpy(priv->ht40_max_power_offset, in rtl8723au_parse_efuse()
1808 priv->efuse_wifi.efuse8723.ht40_max_power_offset, in rtl8723au_parse_efuse()
1809 sizeof(priv->ht40_max_power_offset)); in rtl8723au_parse_efuse()
1810 memcpy(priv->ht20_max_power_offset, in rtl8723au_parse_efuse()
1811 priv->efuse_wifi.efuse8723.ht20_max_power_offset, in rtl8723au_parse_efuse()
1812 sizeof(priv->ht20_max_power_offset)); in rtl8723au_parse_efuse()
1814 dev_info(&priv->udev->dev, "Vendor: %.7s\n", in rtl8723au_parse_efuse()
1815 priv->efuse_wifi.efuse8723.vendor_name); in rtl8723au_parse_efuse()
1816 dev_info(&priv->udev->dev, "Product: %.41s\n", in rtl8723au_parse_efuse()
1817 priv->efuse_wifi.efuse8723.device_name); in rtl8723au_parse_efuse()
1823 static int rtl8192cu_parse_efuse(struct rtl8xxxu_priv *priv) in rtl8192cu_parse_efuse() argument
1827 if (priv->efuse_wifi.efuse8192.rtl_id != cpu_to_le16(0x8129)) in rtl8192cu_parse_efuse()
1830 ether_addr_copy(priv->mac_addr, priv->efuse_wifi.efuse8192.mac_addr); in rtl8192cu_parse_efuse()
1832 memcpy(priv->cck_tx_power_index_A, in rtl8192cu_parse_efuse()
1833 priv->efuse_wifi.efuse8192.cck_tx_power_index_A, in rtl8192cu_parse_efuse()
1834 sizeof(priv->cck_tx_power_index_A)); in rtl8192cu_parse_efuse()
1835 memcpy(priv->cck_tx_power_index_B, in rtl8192cu_parse_efuse()
1836 priv->efuse_wifi.efuse8192.cck_tx_power_index_B, in rtl8192cu_parse_efuse()
1837 sizeof(priv->cck_tx_power_index_B)); in rtl8192cu_parse_efuse()
1839 memcpy(priv->ht40_1s_tx_power_index_A, in rtl8192cu_parse_efuse()
1840 priv->efuse_wifi.efuse8192.ht40_1s_tx_power_index_A, in rtl8192cu_parse_efuse()
1841 sizeof(priv->ht40_1s_tx_power_index_A)); in rtl8192cu_parse_efuse()
1842 memcpy(priv->ht40_1s_tx_power_index_B, in rtl8192cu_parse_efuse()
1843 priv->efuse_wifi.efuse8192.ht40_1s_tx_power_index_B, in rtl8192cu_parse_efuse()
1844 sizeof(priv->ht40_1s_tx_power_index_B)); in rtl8192cu_parse_efuse()
1845 memcpy(priv->ht40_2s_tx_power_index_diff, in rtl8192cu_parse_efuse()
1846 priv->efuse_wifi.efuse8192.ht40_2s_tx_power_index_diff, in rtl8192cu_parse_efuse()
1847 sizeof(priv->ht40_2s_tx_power_index_diff)); in rtl8192cu_parse_efuse()
1849 memcpy(priv->ht20_tx_power_index_diff, in rtl8192cu_parse_efuse()
1850 priv->efuse_wifi.efuse8192.ht20_tx_power_index_diff, in rtl8192cu_parse_efuse()
1851 sizeof(priv->ht20_tx_power_index_diff)); in rtl8192cu_parse_efuse()
1852 memcpy(priv->ofdm_tx_power_index_diff, in rtl8192cu_parse_efuse()
1853 priv->efuse_wifi.efuse8192.ofdm_tx_power_index_diff, in rtl8192cu_parse_efuse()
1854 sizeof(priv->ofdm_tx_power_index_diff)); in rtl8192cu_parse_efuse()
1856 memcpy(priv->ht40_max_power_offset, in rtl8192cu_parse_efuse()
1857 priv->efuse_wifi.efuse8192.ht40_max_power_offset, in rtl8192cu_parse_efuse()
1858 sizeof(priv->ht40_max_power_offset)); in rtl8192cu_parse_efuse()
1859 memcpy(priv->ht20_max_power_offset, in rtl8192cu_parse_efuse()
1860 priv->efuse_wifi.efuse8192.ht20_max_power_offset, in rtl8192cu_parse_efuse()
1861 sizeof(priv->ht20_max_power_offset)); in rtl8192cu_parse_efuse()
1863 dev_info(&priv->udev->dev, "Vendor: %.7s\n", in rtl8192cu_parse_efuse()
1864 priv->efuse_wifi.efuse8192.vendor_name); in rtl8192cu_parse_efuse()
1865 dev_info(&priv->udev->dev, "Product: %.20s\n", in rtl8192cu_parse_efuse()
1866 priv->efuse_wifi.efuse8192.device_name); in rtl8192cu_parse_efuse()
1868 if (priv->efuse_wifi.efuse8192.rf_regulatory & 0x20) { in rtl8192cu_parse_efuse()
1869 sprintf(priv->chip_name, "8188RU"); in rtl8192cu_parse_efuse()
1870 priv->hi_pa = 1; in rtl8192cu_parse_efuse()
1874 unsigned char *raw = priv->efuse_wifi.raw; in rtl8192cu_parse_efuse()
1876 dev_info(&priv->udev->dev, in rtl8192cu_parse_efuse()
1880 dev_info(&priv->udev->dev, "%02x: " in rtl8192cu_parse_efuse()
1893 rtl8xxxu_read_efuse8(struct rtl8xxxu_priv *priv, u16 offset, u8 *data) in rtl8xxxu_read_efuse8() argument
1900 rtl8xxxu_write8(priv, REG_EFUSE_CTRL + 1, offset & 0xff); in rtl8xxxu_read_efuse8()
1901 val8 = rtl8xxxu_read8(priv, REG_EFUSE_CTRL + 2); in rtl8xxxu_read_efuse8()
1904 rtl8xxxu_write8(priv, REG_EFUSE_CTRL + 2, val8); in rtl8xxxu_read_efuse8()
1906 val8 = rtl8xxxu_read8(priv, REG_EFUSE_CTRL + 3); in rtl8xxxu_read_efuse8()
1907 rtl8xxxu_write8(priv, REG_EFUSE_CTRL + 3, val8 & 0x7f); in rtl8xxxu_read_efuse8()
1910 val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL); in rtl8xxxu_read_efuse8()
1912 val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL); in rtl8xxxu_read_efuse8()
1921 val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL); in rtl8xxxu_read_efuse8()
1927 static int rtl8xxxu_read_efuse(struct rtl8xxxu_priv *priv) in rtl8xxxu_read_efuse() argument
1929 struct device *dev = &priv->udev->dev; in rtl8xxxu_read_efuse()
1935 val16 = rtl8xxxu_read16(priv, REG_9346CR); in rtl8xxxu_read_efuse()
1937 priv->has_eeprom = 1; in rtl8xxxu_read_efuse()
1939 priv->boot_eeprom = 1; in rtl8xxxu_read_efuse()
1941 val32 = rtl8xxxu_read32(priv, REG_EFUSE_TEST); in rtl8xxxu_read_efuse()
1943 rtl8xxxu_write32(priv, REG_EFUSE_TEST, val32); in rtl8xxxu_read_efuse()
1946 priv->boot_eeprom ? "EEPROM" : "EFUSE"); in rtl8xxxu_read_efuse()
1948 rtl8xxxu_write8(priv, REG_EFUSE_ACCESS, EFUSE_ACCESS_ENABLE); in rtl8xxxu_read_efuse()
1951 val16 = rtl8xxxu_read16(priv, REG_SYS_ISO_CTRL); in rtl8xxxu_read_efuse()
1954 rtl8xxxu_write16(priv, REG_SYS_ISO_CTRL, val16); in rtl8xxxu_read_efuse()
1957 val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC); in rtl8xxxu_read_efuse()
1960 rtl8xxxu_write16(priv, REG_SYS_FUNC, val16); in rtl8xxxu_read_efuse()
1966 val16 = rtl8xxxu_read16(priv, REG_SYS_CLKR); in rtl8xxxu_read_efuse()
1969 rtl8xxxu_write16(priv, REG_SYS_CLKR, val16); in rtl8xxxu_read_efuse()
1973 memset(priv->efuse_wifi.raw, 0xff, EFUSE_MAP_LEN_8723A); in rtl8xxxu_read_efuse()
1977 ret = rtl8xxxu_read_efuse8(priv, efuse_addr++, &header); in rtl8xxxu_read_efuse()
1984 ret = rtl8xxxu_read_efuse8(priv, efuse_addr++, in rtl8xxxu_read_efuse()
2015 ret = rtl8xxxu_read_efuse8(priv, in rtl8xxxu_read_efuse()
2020 priv->efuse_wifi.raw[map_addr++] = val8; in rtl8xxxu_read_efuse()
2022 ret = rtl8xxxu_read_efuse8(priv, in rtl8xxxu_read_efuse()
2027 priv->efuse_wifi.raw[map_addr++] = val8; in rtl8xxxu_read_efuse()
2041 rtl8xxxu_write8(priv, REG_EFUSE_ACCESS, EFUSE_ACCESS_DISABLE); in rtl8xxxu_read_efuse()
2046 static int rtl8xxxu_start_firmware(struct rtl8xxxu_priv *priv) in rtl8xxxu_start_firmware() argument
2048 struct device *dev = &priv->udev->dev; in rtl8xxxu_start_firmware()
2054 val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL); in rtl8xxxu_start_firmware()
2065 val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL); in rtl8xxxu_start_firmware()
2068 rtl8xxxu_write32(priv, REG_MCU_FW_DL, val32); in rtl8xxxu_start_firmware()
2072 val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL); in rtl8xxxu_start_firmware()
2089 static int rtl8xxxu_download_firmware(struct rtl8xxxu_priv *priv) in rtl8xxxu_download_firmware() argument
2097 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC + 1); in rtl8xxxu_download_firmware()
2099 rtl8xxxu_write8(priv, REG_SYS_FUNC + 1, val8); in rtl8xxxu_download_firmware()
2102 val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC); in rtl8xxxu_download_firmware()
2103 rtl8xxxu_write16(priv, REG_SYS_FUNC, val16 | SYS_FUNC_CPU_ENABLE); in rtl8xxxu_download_firmware()
2106 val8 = rtl8xxxu_read8(priv, REG_MCU_FW_DL); in rtl8xxxu_download_firmware()
2107 rtl8xxxu_write8(priv, REG_MCU_FW_DL, val8 | MCU_FW_DL_ENABLE); in rtl8xxxu_download_firmware()
2110 val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL); in rtl8xxxu_download_firmware()
2111 rtl8xxxu_write32(priv, REG_MCU_FW_DL, val32 & ~BIT(19)); in rtl8xxxu_download_firmware()
2114 val8 = rtl8xxxu_read8(priv, REG_MCU_FW_DL); in rtl8xxxu_download_firmware()
2115 rtl8xxxu_write8(priv, REG_MCU_FW_DL, val8 | MCU_FW_DL_CSUM_REPORT); in rtl8xxxu_download_firmware()
2117 pages = priv->fw_size / RTL_FW_PAGE_SIZE; in rtl8xxxu_download_firmware()
2118 remainder = priv->fw_size % RTL_FW_PAGE_SIZE; in rtl8xxxu_download_firmware()
2120 fwptr = priv->fw_data->data; in rtl8xxxu_download_firmware()
2123 val8 = rtl8xxxu_read8(priv, REG_MCU_FW_DL + 2) & 0xF8; in rtl8xxxu_download_firmware()
2124 rtl8xxxu_write8(priv, REG_MCU_FW_DL + 2, val8 | i); in rtl8xxxu_download_firmware()
2126 ret = rtl8xxxu_writeN(priv, REG_FW_START_ADDRESS, in rtl8xxxu_download_firmware()
2137 val8 = rtl8xxxu_read8(priv, REG_MCU_FW_DL + 2) & 0xF8; in rtl8xxxu_download_firmware()
2138 rtl8xxxu_write8(priv, REG_MCU_FW_DL + 2, val8 | i); in rtl8xxxu_download_firmware()
2139 ret = rtl8xxxu_writeN(priv, REG_FW_START_ADDRESS, in rtl8xxxu_download_firmware()
2150 val16 = rtl8xxxu_read16(priv, REG_MCU_FW_DL); in rtl8xxxu_download_firmware()
2151 rtl8xxxu_write16(priv, REG_MCU_FW_DL, in rtl8xxxu_download_firmware()
2157 static int rtl8xxxu_load_firmware(struct rtl8xxxu_priv *priv, char *fw_name) in rtl8xxxu_load_firmware() argument
2159 struct device *dev = &priv->udev->dev; in rtl8xxxu_load_firmware()
2165 if (request_firmware(&fw, fw_name, &priv->udev->dev)) { in rtl8xxxu_load_firmware()
2176 priv->fw_data = kmemdup(fw->data, fw->size, GFP_KERNEL); in rtl8xxxu_load_firmware()
2177 priv->fw_size = fw->size - sizeof(struct rtl8xxxu_firmware_header); in rtl8xxxu_load_firmware()
2179 signature = le16_to_cpu(priv->fw_data->signature); in rtl8xxxu_load_firmware()
2192 le16_to_cpu(priv->fw_data->major_version), in rtl8xxxu_load_firmware()
2193 priv->fw_data->minor_version, signature); in rtl8xxxu_load_firmware()
2200 static int rtl8723au_load_firmware(struct rtl8xxxu_priv *priv) in rtl8723au_load_firmware() argument
2205 switch (priv->chip_cut) { in rtl8723au_load_firmware()
2210 if (priv->enable_bluetooth) in rtl8723au_load_firmware()
2220 ret = rtl8xxxu_load_firmware(priv, fw_name); in rtl8723au_load_firmware()
2226 static int rtl8192cu_load_firmware(struct rtl8xxxu_priv *priv) in rtl8192cu_load_firmware() argument
2231 if (!priv->vendor_umc) in rtl8192cu_load_firmware()
2233 else if (priv->chip_cut || priv->rtlchip == 0x8192c) in rtl8192cu_load_firmware()
2238 ret = rtl8xxxu_load_firmware(priv, fw_name); in rtl8192cu_load_firmware()
2245 static void rtl8xxxu_firmware_self_reset(struct rtl8xxxu_priv *priv) in rtl8xxxu_firmware_self_reset() argument
2251 rtl8xxxu_write8(priv, REG_HMTFR + 3, 0x20); in rtl8xxxu_firmware_self_reset()
2254 val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC); in rtl8xxxu_firmware_self_reset()
2257 dev_dbg(&priv->udev->dev, in rtl8xxxu_firmware_self_reset()
2266 val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC); in rtl8xxxu_firmware_self_reset()
2268 rtl8xxxu_write16(priv, REG_SYS_FUNC, val16); in rtl8xxxu_firmware_self_reset()
2273 rtl8xxxu_init_mac(struct rtl8xxxu_priv *priv, struct rtl8xxxu_reg8val *array) in rtl8xxxu_init_mac() argument
2286 ret = rtl8xxxu_write8(priv, reg, val); in rtl8xxxu_init_mac()
2288 dev_warn(&priv->udev->dev, in rtl8xxxu_init_mac()
2294 rtl8xxxu_write8(priv, REG_MAX_AGGR_NUM, 0x0a); in rtl8xxxu_init_mac()
2299 static int rtl8xxxu_init_phy_regs(struct rtl8xxxu_priv *priv, in rtl8xxxu_init_phy_regs() argument
2313 ret = rtl8xxxu_write32(priv, reg, val); in rtl8xxxu_init_phy_regs()
2315 dev_warn(&priv->udev->dev, in rtl8xxxu_init_phy_regs()
2328 static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv) in rtl8xxxu_init_phy_bb() argument
2338 val8 = rtl8xxxu_read8(priv, REG_AFE_PLL_CTRL); in rtl8xxxu_init_phy_bb()
2341 rtl8xxxu_write8(priv, REG_AFE_PLL_CTRL, val8); in rtl8xxxu_init_phy_bb()
2344 rtl8xxxu_write8(priv, REG_AFE_PLL_CTRL + 1, 0xff); in rtl8xxxu_init_phy_bb()
2347 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC); in rtl8xxxu_init_phy_bb()
2349 rtl8xxxu_write8(priv, REG_SYS_FUNC, val8); in rtl8xxxu_init_phy_bb()
2352 val32 = rtl8xxxu_read32(priv, REG_AFE_XTAL_CTRL); in rtl8xxxu_init_phy_bb()
2354 if (priv->has_bluetooth) in rtl8xxxu_init_phy_bb()
2356 rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, val32); in rtl8xxxu_init_phy_bb()
2360 rtl8xxxu_write8(priv, REG_RF_CTRL, val8); in rtl8xxxu_init_phy_bb()
2362 if (priv->hi_pa) in rtl8xxxu_init_phy_bb()
2363 rtl8xxxu_init_phy_regs(priv, rtl8188ru_phy_1t_highpa_table); in rtl8xxxu_init_phy_bb()
2364 else if (priv->tx_paths == 2) in rtl8xxxu_init_phy_bb()
2365 rtl8xxxu_init_phy_regs(priv, rtl8192cu_phy_2t_init_table); in rtl8xxxu_init_phy_bb()
2367 rtl8xxxu_init_phy_regs(priv, rtl8723a_phy_1t_init_table); in rtl8xxxu_init_phy_bb()
2370 if (priv->rtlchip == 0x8188c && priv->hi_pa && in rtl8xxxu_init_phy_bb()
2371 priv->vendor_umc && priv->chip_cut == 1) in rtl8xxxu_init_phy_bb()
2372 rtl8xxxu_write8(priv, REG_OFDM0_AGC_PARM1 + 2, 0x50); in rtl8xxxu_init_phy_bb()
2374 if (priv->tx_paths == 1 && priv->rx_paths == 2) { in rtl8xxxu_init_phy_bb()
2380 val32 = rtl8xxxu_read32(priv, REG_FPGA0_TX_INFO); in rtl8xxxu_init_phy_bb()
2383 rtl8xxxu_write32(priv, REG_FPGA0_TX_INFO, val32); in rtl8xxxu_init_phy_bb()
2385 val32 = rtl8xxxu_read32(priv, REG_FPGA1_TX_INFO); in rtl8xxxu_init_phy_bb()
2388 rtl8xxxu_write32(priv, REG_FPGA1_TX_INFO, val32); in rtl8xxxu_init_phy_bb()
2390 val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING); in rtl8xxxu_init_phy_bb()
2393 rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32); in rtl8xxxu_init_phy_bb()
2395 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_init_phy_bb()
2399 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_init_phy_bb()
2401 val32 = rtl8xxxu_read32(priv, REG_OFDM0_AGC_PARM1); in rtl8xxxu_init_phy_bb()
2404 rtl8xxxu_write32(priv, REG_OFDM0_AGC_PARM1, val32); in rtl8xxxu_init_phy_bb()
2406 val32 = rtl8xxxu_read32(priv, REG_TX_CCK_RFON); in rtl8xxxu_init_phy_bb()
2409 rtl8xxxu_write32(priv, REG_TX_CCK_RFON, val32); in rtl8xxxu_init_phy_bb()
2411 val32 = rtl8xxxu_read32(priv, REG_TX_CCK_BBON); in rtl8xxxu_init_phy_bb()
2414 rtl8xxxu_write32(priv, REG_TX_CCK_BBON, val32); in rtl8xxxu_init_phy_bb()
2416 val32 = rtl8xxxu_read32(priv, REG_TX_OFDM_RFON); in rtl8xxxu_init_phy_bb()
2419 rtl8xxxu_write32(priv, REG_TX_OFDM_RFON, val32); in rtl8xxxu_init_phy_bb()
2421 val32 = rtl8xxxu_read32(priv, REG_TX_OFDM_BBON); in rtl8xxxu_init_phy_bb()
2424 rtl8xxxu_write32(priv, REG_TX_OFDM_BBON, val32); in rtl8xxxu_init_phy_bb()
2426 val32 = rtl8xxxu_read32(priv, REG_TX_TO_TX); in rtl8xxxu_init_phy_bb()
2429 rtl8xxxu_write32(priv, REG_TX_TO_TX, val32); in rtl8xxxu_init_phy_bb()
2432 if (priv->hi_pa) in rtl8xxxu_init_phy_bb()
2433 rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_highpa_table); in rtl8xxxu_init_phy_bb()
2435 rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_standard_table); in rtl8xxxu_init_phy_bb()
2437 if (priv->rtlchip == 0x8723a && in rtl8xxxu_init_phy_bb()
2438 priv->efuse_wifi.efuse8723.version >= 0x01) { in rtl8xxxu_init_phy_bb()
2439 val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL); in rtl8xxxu_init_phy_bb()
2441 val8 = priv->efuse_wifi.efuse8723.xtal_k & 0x3f; in rtl8xxxu_init_phy_bb()
2445 rtl8xxxu_write32(priv, REG_MAC_PHY_CTRL, val32); in rtl8xxxu_init_phy_bb()
2454 rtl8xxxu_write32(priv, REG_LDOA15_CTRL, val32); in rtl8xxxu_init_phy_bb()
2459 static int rtl8xxxu_init_rf_regs(struct rtl8xxxu_priv *priv, in rtl8xxxu_init_rf_regs() argument
2497 ret = rtl8xxxu_write_rfreg(priv, path, reg, val); in rtl8xxxu_init_rf_regs()
2499 dev_warn(&priv->udev->dev, in rtl8xxxu_init_rf_regs()
2509 static int rtl8xxxu_init_phy_rf(struct rtl8xxxu_priv *priv, in rtl8xxxu_init_phy_rf() argument
2529 dev_err(&priv->udev->dev, "%s:Unsupported RF path %c\n", in rtl8xxxu_init_phy_rf()
2534 rfsi_rfenv = rtl8xxxu_read16(priv, reg_sw_ctrl); in rtl8xxxu_init_phy_rf()
2540 val32 = rtl8xxxu_read32(priv, reg_int_oe); in rtl8xxxu_init_phy_rf()
2542 rtl8xxxu_write32(priv, reg_int_oe, val32); in rtl8xxxu_init_phy_rf()
2545 val32 = rtl8xxxu_read32(priv, reg_int_oe); in rtl8xxxu_init_phy_rf()
2547 rtl8xxxu_write32(priv, reg_int_oe, val32); in rtl8xxxu_init_phy_rf()
2553 val32 = rtl8xxxu_read32(priv, reg_hssi_parm2); in rtl8xxxu_init_phy_rf()
2555 rtl8xxxu_write32(priv, reg_hssi_parm2, val32); in rtl8xxxu_init_phy_rf()
2558 val32 = rtl8xxxu_read32(priv, reg_hssi_parm2); in rtl8xxxu_init_phy_rf()
2560 rtl8xxxu_write32(priv, reg_hssi_parm2, val32); in rtl8xxxu_init_phy_rf()
2563 rtl8xxxu_init_rf_regs(priv, table, path); in rtl8xxxu_init_phy_rf()
2566 val16 = rtl8xxxu_read16(priv, reg_sw_ctrl); in rtl8xxxu_init_phy_rf()
2569 rtl8xxxu_write16(priv, reg_sw_ctrl, val16); in rtl8xxxu_init_phy_rf()
2574 static int rtl8xxxu_llt_write(struct rtl8xxxu_priv *priv, u8 address, u8 data) in rtl8xxxu_llt_write() argument
2582 rtl8xxxu_write32(priv, REG_LLT_INIT, value); in rtl8xxxu_llt_write()
2585 value = rtl8xxxu_read32(priv, REG_LLT_INIT); in rtl8xxxu_llt_write()
2595 static int rtl8xxxu_init_llt_table(struct rtl8xxxu_priv *priv, u8 last_tx_page) in rtl8xxxu_init_llt_table() argument
2601 ret = rtl8xxxu_llt_write(priv, i, i + 1); in rtl8xxxu_init_llt_table()
2606 ret = rtl8xxxu_llt_write(priv, last_tx_page, 0xff); in rtl8xxxu_init_llt_table()
2612 ret = rtl8xxxu_llt_write(priv, i, (i + 1)); in rtl8xxxu_init_llt_table()
2618 ret = rtl8xxxu_llt_write(priv, 0xff, last_tx_page + 1); in rtl8xxxu_init_llt_table()
2626 static int rtl8xxxu_init_queue_priority(struct rtl8xxxu_priv *priv) in rtl8xxxu_init_queue_priority() argument
2633 switch (priv->ep_tx_count) { in rtl8xxxu_init_queue_priority()
2635 if (priv->ep_tx_high_queue) { in rtl8xxxu_init_queue_priority()
2637 } else if (priv->ep_tx_low_queue) { in rtl8xxxu_init_queue_priority()
2639 } else if (priv->ep_tx_normal_queue) { in rtl8xxxu_init_queue_priority()
2661 if (priv->ep_tx_high_queue && priv->ep_tx_low_queue) { in rtl8xxxu_init_queue_priority()
2664 } else if (priv->ep_tx_normal_queue && priv->ep_tx_low_queue) { in rtl8xxxu_init_queue_priority()
2667 } else if (priv->ep_tx_high_queue && priv->ep_tx_normal_queue) { in rtl8xxxu_init_queue_priority()
2714 val16 = rtl8xxxu_read16(priv, REG_TRXDMA_CTRL); in rtl8xxxu_init_queue_priority()
2722 rtl8xxxu_write16(priv, REG_TRXDMA_CTRL, val16); in rtl8xxxu_init_queue_priority()
2724 priv->pipe_out[TXDESC_QUEUE_VO] = in rtl8xxxu_init_queue_priority()
2725 usb_sndbulkpipe(priv->udev, priv->out_ep[vop]); in rtl8xxxu_init_queue_priority()
2726 priv->pipe_out[TXDESC_QUEUE_VI] = in rtl8xxxu_init_queue_priority()
2727 usb_sndbulkpipe(priv->udev, priv->out_ep[vip]); in rtl8xxxu_init_queue_priority()
2728 priv->pipe_out[TXDESC_QUEUE_BE] = in rtl8xxxu_init_queue_priority()
2729 usb_sndbulkpipe(priv->udev, priv->out_ep[bep]); in rtl8xxxu_init_queue_priority()
2730 priv->pipe_out[TXDESC_QUEUE_BK] = in rtl8xxxu_init_queue_priority()
2731 usb_sndbulkpipe(priv->udev, priv->out_ep[bkp]); in rtl8xxxu_init_queue_priority()
2732 priv->pipe_out[TXDESC_QUEUE_BEACON] = in rtl8xxxu_init_queue_priority()
2733 usb_sndbulkpipe(priv->udev, priv->out_ep[0]); in rtl8xxxu_init_queue_priority()
2734 priv->pipe_out[TXDESC_QUEUE_MGNT] = in rtl8xxxu_init_queue_priority()
2735 usb_sndbulkpipe(priv->udev, priv->out_ep[mgp]); in rtl8xxxu_init_queue_priority()
2736 priv->pipe_out[TXDESC_QUEUE_HIGH] = in rtl8xxxu_init_queue_priority()
2737 usb_sndbulkpipe(priv->udev, priv->out_ep[hip]); in rtl8xxxu_init_queue_priority()
2738 priv->pipe_out[TXDESC_QUEUE_CMD] = in rtl8xxxu_init_queue_priority()
2739 usb_sndbulkpipe(priv->udev, priv->out_ep[0]); in rtl8xxxu_init_queue_priority()
2745 static void rtl8xxxu_fill_iqk_matrix_a(struct rtl8xxxu_priv *priv, in rtl8xxxu_fill_iqk_matrix_a() argument
2756 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_a()
2764 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_a()
2767 rtl8xxxu_write32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_a()
2769 val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES); in rtl8xxxu_fill_iqk_matrix_a()
2773 rtl8xxxu_write32(priv, REG_OFDM0_ENERGY_CCA_THRES, val32); in rtl8xxxu_fill_iqk_matrix_a()
2780 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XC_TX_AFE); in rtl8xxxu_fill_iqk_matrix_a()
2783 rtl8xxxu_write32(priv, REG_OFDM0_XC_TX_AFE, val32); in rtl8xxxu_fill_iqk_matrix_a()
2785 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_a()
2788 rtl8xxxu_write32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_a()
2790 val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES); in rtl8xxxu_fill_iqk_matrix_a()
2794 rtl8xxxu_write32(priv, REG_OFDM0_ENERGY_CCA_THRES, val32); in rtl8xxxu_fill_iqk_matrix_a()
2797 dev_dbg(&priv->udev->dev, "%s: only TX\n", __func__); in rtl8xxxu_fill_iqk_matrix_a()
2803 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_a()
2806 rtl8xxxu_write32(priv, REG_OFDM0_XA_RX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_a()
2810 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_a()
2813 rtl8xxxu_write32(priv, REG_OFDM0_XA_RX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_a()
2817 val32 = rtl8xxxu_read32(priv, REG_OFDM0_RX_IQ_EXT_ANTA); in rtl8xxxu_fill_iqk_matrix_a()
2820 rtl8xxxu_write32(priv, REG_OFDM0_RX_IQ_EXT_ANTA, val32); in rtl8xxxu_fill_iqk_matrix_a()
2823 static void rtl8xxxu_fill_iqk_matrix_b(struct rtl8xxxu_priv *priv, in rtl8xxxu_fill_iqk_matrix_b() argument
2834 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_b()
2842 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_b()
2845 rtl8xxxu_write32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_b()
2847 val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES); in rtl8xxxu_fill_iqk_matrix_b()
2851 rtl8xxxu_write32(priv, REG_OFDM0_ENERGY_CCA_THRES, val32); in rtl8xxxu_fill_iqk_matrix_b()
2858 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XD_TX_AFE); in rtl8xxxu_fill_iqk_matrix_b()
2861 rtl8xxxu_write32(priv, REG_OFDM0_XD_TX_AFE, val32); in rtl8xxxu_fill_iqk_matrix_b()
2863 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_b()
2866 rtl8xxxu_write32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_b()
2868 val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES); in rtl8xxxu_fill_iqk_matrix_b()
2872 rtl8xxxu_write32(priv, REG_OFDM0_ENERGY_CCA_THRES, val32); in rtl8xxxu_fill_iqk_matrix_b()
2875 dev_dbg(&priv->udev->dev, "%s: only TX\n", __func__); in rtl8xxxu_fill_iqk_matrix_b()
2881 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_RX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_b()
2884 rtl8xxxu_write32(priv, REG_OFDM0_XB_RX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_b()
2888 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_RX_IQ_IMBALANCE); in rtl8xxxu_fill_iqk_matrix_b()
2891 rtl8xxxu_write32(priv, REG_OFDM0_XB_RX_IQ_IMBALANCE, val32); in rtl8xxxu_fill_iqk_matrix_b()
2895 val32 = rtl8xxxu_read32(priv, REG_OFDM0_AGCR_SSI_TABLE); in rtl8xxxu_fill_iqk_matrix_b()
2898 rtl8xxxu_write32(priv, REG_OFDM0_AGCR_SSI_TABLE, val32); in rtl8xxxu_fill_iqk_matrix_b()
2903 static bool rtl8xxxu_simularity_compare(struct rtl8xxxu_priv *priv, in rtl8xxxu_simularity_compare() argument
2910 if (priv->tx_paths > 1) in rtl8xxxu_simularity_compare()
2948 } else if (!(simubitmap & 0xf0) && priv->tx_paths > 1) { in rtl8xxxu_simularity_compare()
2958 rtl8xxxu_save_mac_regs(struct rtl8xxxu_priv *priv, const u32 *reg, u32 *backup) in rtl8xxxu_save_mac_regs() argument
2963 backup[i] = rtl8xxxu_read8(priv, reg[i]); in rtl8xxxu_save_mac_regs()
2965 backup[i] = rtl8xxxu_read32(priv, reg[i]); in rtl8xxxu_save_mac_regs()
2968 static void rtl8xxxu_restore_mac_regs(struct rtl8xxxu_priv *priv, in rtl8xxxu_restore_mac_regs() argument
2974 rtl8xxxu_write8(priv, reg[i], backup[i]); in rtl8xxxu_restore_mac_regs()
2976 rtl8xxxu_write32(priv, reg[i], backup[i]); in rtl8xxxu_restore_mac_regs()
2979 static void rtl8xxxu_save_regs(struct rtl8xxxu_priv *priv, const u32 *regs, in rtl8xxxu_save_regs() argument
2985 backup[i] = rtl8xxxu_read32(priv, regs[i]); in rtl8xxxu_save_regs()
2988 static void rtl8xxxu_restore_regs(struct rtl8xxxu_priv *priv, const u32 *regs, in rtl8xxxu_restore_regs() argument
2994 rtl8xxxu_write32(priv, regs[i], backup[i]); in rtl8xxxu_restore_regs()
2998 static void rtl8xxxu_path_adda_on(struct rtl8xxxu_priv *priv, const u32 *regs, in rtl8xxxu_path_adda_on() argument
3005 if (priv->tx_paths == 1) { in rtl8xxxu_path_adda_on()
3007 rtl8xxxu_write32(priv, regs[0], 0x0b1b25a0); in rtl8xxxu_path_adda_on()
3009 rtl8xxxu_write32(priv, regs[0], path_on); in rtl8xxxu_path_adda_on()
3013 rtl8xxxu_write32(priv, regs[i], path_on); in rtl8xxxu_path_adda_on()
3016 static void rtl8xxxu_mac_calibration(struct rtl8xxxu_priv *priv, in rtl8xxxu_mac_calibration() argument
3021 rtl8xxxu_write8(priv, regs[i], 0x3f); in rtl8xxxu_mac_calibration()
3024 rtl8xxxu_write8(priv, regs[i], (u8)(backup[i] & ~BIT(3))); in rtl8xxxu_mac_calibration()
3026 rtl8xxxu_write8(priv, regs[i], (u8)(backup[i] & ~BIT(5))); in rtl8xxxu_mac_calibration()
3029 static int rtl8xxxu_iqk_path_a(struct rtl8xxxu_priv *priv) in rtl8xxxu_iqk_path_a() argument
3035 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x10008c1f); in rtl8xxxu_iqk_path_a()
3036 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x10008c1f); in rtl8xxxu_iqk_path_a()
3037 rtl8xxxu_write32(priv, REG_TX_IQK_PI_A, 0x82140102); in rtl8xxxu_iqk_path_a()
3039 val32 = (priv->rf_paths > 1) ? 0x28160202 : in rtl8xxxu_iqk_path_a()
3042 rtl8xxxu_write32(priv, REG_RX_IQK_PI_A, val32); in rtl8xxxu_iqk_path_a()
3045 if (priv->rf_paths > 1) { in rtl8xxxu_iqk_path_a()
3046 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_B, 0x10008c22); in rtl8xxxu_iqk_path_a()
3047 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_B, 0x10008c22); in rtl8xxxu_iqk_path_a()
3048 rtl8xxxu_write32(priv, REG_TX_IQK_PI_B, 0x82140102); in rtl8xxxu_iqk_path_a()
3049 rtl8xxxu_write32(priv, REG_RX_IQK_PI_B, 0x28160202); in rtl8xxxu_iqk_path_a()
3053 rtl8xxxu_write32(priv, REG_IQK_AGC_RSP, 0x001028d1); in rtl8xxxu_iqk_path_a()
3056 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf9000000); in rtl8xxxu_iqk_path_a()
3057 rtl8xxxu_write32(priv, REG_IQK_AGC_PTS, 0xf8000000); in rtl8xxxu_iqk_path_a()
3062 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8xxxu_iqk_path_a()
3063 reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A); in rtl8xxxu_iqk_path_a()
3064 reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A); in rtl8xxxu_iqk_path_a()
3065 reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2); in rtl8xxxu_iqk_path_a()
3080 dev_warn(&priv->udev->dev, "%s: Path A RX IQK failed!\n", in rtl8xxxu_iqk_path_a()
3086 static int rtl8xxxu_iqk_path_b(struct rtl8xxxu_priv *priv) in rtl8xxxu_iqk_path_b() argument
3092 rtl8xxxu_write32(priv, REG_IQK_AGC_CONT, 0x00000002); in rtl8xxxu_iqk_path_b()
3093 rtl8xxxu_write32(priv, REG_IQK_AGC_CONT, 0x00000000); in rtl8xxxu_iqk_path_b()
3098 reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2); in rtl8xxxu_iqk_path_b()
3099 reg_eb4 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B); in rtl8xxxu_iqk_path_b()
3100 reg_ebc = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B); in rtl8xxxu_iqk_path_b()
3101 reg_ec4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_B_2); in rtl8xxxu_iqk_path_b()
3102 reg_ecc = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_B_2); in rtl8xxxu_iqk_path_b()
3116 dev_warn(&priv->udev->dev, "%s: Path B RX IQK failed!\n", in rtl8xxxu_iqk_path_b()
3122 static void rtl8xxxu_phy_iqcalibrate(struct rtl8xxxu_priv *priv, in rtl8xxxu_phy_iqcalibrate() argument
3125 struct device *dev = &priv->udev->dev; in rtl8xxxu_phy_iqcalibrate()
3157 rtl8xxxu_save_regs(priv, adda_regs, priv->adda_backup, in rtl8xxxu_phy_iqcalibrate()
3159 rtl8xxxu_save_mac_regs(priv, iqk_mac_regs, priv->mac_backup); in rtl8xxxu_phy_iqcalibrate()
3160 rtl8xxxu_save_regs(priv, iqk_bb_regs, in rtl8xxxu_phy_iqcalibrate()
3161 priv->bb_backup, RTL8XXXU_BB_REGS); in rtl8xxxu_phy_iqcalibrate()
3164 rtl8xxxu_path_adda_on(priv, adda_regs, true); in rtl8xxxu_phy_iqcalibrate()
3167 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1); in rtl8xxxu_phy_iqcalibrate()
3169 priv->pi_enabled = 1; in rtl8xxxu_phy_iqcalibrate()
3172 if (!priv->pi_enabled) { in rtl8xxxu_phy_iqcalibrate()
3174 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM1, 0x01000100); in rtl8xxxu_phy_iqcalibrate()
3175 rtl8xxxu_write32(priv, REG_FPGA0_XB_HSSI_PARM1, 0x01000100); in rtl8xxxu_phy_iqcalibrate()
3178 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_phy_iqcalibrate()
3180 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_phy_iqcalibrate()
3182 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8xxxu_phy_iqcalibrate()
3183 rtl8xxxu_write32(priv, REG_OFDM0_TR_MUX_PAR, 0x000800e4); in rtl8xxxu_phy_iqcalibrate()
3184 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_SW_CTRL, 0x22204000); in rtl8xxxu_phy_iqcalibrate()
3186 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XAB_RF_SW_CTRL); in rtl8xxxu_phy_iqcalibrate()
3188 rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_SW_CTRL, val32); in rtl8xxxu_phy_iqcalibrate()
3190 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8xxxu_phy_iqcalibrate()
3192 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8xxxu_phy_iqcalibrate()
3193 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE); in rtl8xxxu_phy_iqcalibrate()
3195 rtl8xxxu_write32(priv, REG_FPGA0_XB_RF_INT_OE, val32); in rtl8xxxu_phy_iqcalibrate()
3197 if (priv->tx_paths > 1) { in rtl8xxxu_phy_iqcalibrate()
3198 rtl8xxxu_write32(priv, REG_FPGA0_XA_LSSI_PARM, 0x00010000); in rtl8xxxu_phy_iqcalibrate()
3199 rtl8xxxu_write32(priv, REG_FPGA0_XB_LSSI_PARM, 0x00010000); in rtl8xxxu_phy_iqcalibrate()
3203 rtl8xxxu_mac_calibration(priv, iqk_mac_regs, priv->mac_backup); in rtl8xxxu_phy_iqcalibrate()
3206 rtl8xxxu_write32(priv, REG_CONFIG_ANT_A, 0x00080000); in rtl8xxxu_phy_iqcalibrate()
3208 if (priv->tx_paths > 1) in rtl8xxxu_phy_iqcalibrate()
3209 rtl8xxxu_write32(priv, REG_CONFIG_ANT_B, 0x00080000); in rtl8xxxu_phy_iqcalibrate()
3212 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8xxxu_phy_iqcalibrate()
3213 rtl8xxxu_write32(priv, REG_TX_IQK, 0x01007c00); in rtl8xxxu_phy_iqcalibrate()
3214 rtl8xxxu_write32(priv, REG_RX_IQK, 0x01004800); in rtl8xxxu_phy_iqcalibrate()
3217 path_a_ok = rtl8xxxu_iqk_path_a(priv); in rtl8xxxu_phy_iqcalibrate()
3219 val32 = rtl8xxxu_read32(priv, in rtl8xxxu_phy_iqcalibrate()
3222 val32 = rtl8xxxu_read32(priv, in rtl8xxxu_phy_iqcalibrate()
3225 val32 = rtl8xxxu_read32(priv, in rtl8xxxu_phy_iqcalibrate()
3228 val32 = rtl8xxxu_read32(priv, in rtl8xxxu_phy_iqcalibrate()
3237 val32 = rtl8xxxu_read32(priv, in rtl8xxxu_phy_iqcalibrate()
3240 val32 = rtl8xxxu_read32(priv, in rtl8xxxu_phy_iqcalibrate()
3249 if (priv->tx_paths > 1) { in rtl8xxxu_phy_iqcalibrate()
3253 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x0); in rtl8xxxu_phy_iqcalibrate()
3254 rtl8xxxu_write32(priv, REG_FPGA0_XA_LSSI_PARM, 0x00010000); in rtl8xxxu_phy_iqcalibrate()
3255 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0x80800000); in rtl8xxxu_phy_iqcalibrate()
3258 rtl8xxxu_path_adda_on(priv, adda_regs, false); in rtl8xxxu_phy_iqcalibrate()
3261 path_b_ok = rtl8xxxu_iqk_path_b(priv); in rtl8xxxu_phy_iqcalibrate()
3263 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B); in rtl8xxxu_phy_iqcalibrate()
3265 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B); in rtl8xxxu_phy_iqcalibrate()
3267 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_B_2); in rtl8xxxu_phy_iqcalibrate()
3269 val32 = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_B_2); in rtl8xxxu_phy_iqcalibrate()
3274 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B); in rtl8xxxu_phy_iqcalibrate()
3276 val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B); in rtl8xxxu_phy_iqcalibrate()
3286 rtl8xxxu_write32(priv, REG_FPGA0_IQK, 0); in rtl8xxxu_phy_iqcalibrate()
3289 if (!priv->pi_enabled) { in rtl8xxxu_phy_iqcalibrate()
3295 rtl8xxxu_write32(priv, REG_FPGA0_XA_HSSI_PARM1, val32); in rtl8xxxu_phy_iqcalibrate()
3296 rtl8xxxu_write32(priv, REG_FPGA0_XB_HSSI_PARM1, val32); in rtl8xxxu_phy_iqcalibrate()
3300 rtl8xxxu_restore_regs(priv, adda_regs, priv->adda_backup, in rtl8xxxu_phy_iqcalibrate()
3304 rtl8xxxu_restore_mac_regs(priv, iqk_mac_regs, priv->mac_backup); in rtl8xxxu_phy_iqcalibrate()
3307 rtl8xxxu_restore_regs(priv, iqk_bb_regs, in rtl8xxxu_phy_iqcalibrate()
3308 priv->bb_backup, RTL8XXXU_BB_REGS); in rtl8xxxu_phy_iqcalibrate()
3311 rtl8xxxu_write32(priv, REG_FPGA0_XA_LSSI_PARM, 0x00032ed3); in rtl8xxxu_phy_iqcalibrate()
3313 if (priv->tx_paths > 1) { in rtl8xxxu_phy_iqcalibrate()
3314 rtl8xxxu_write32(priv, REG_FPGA0_XB_LSSI_PARM, in rtl8xxxu_phy_iqcalibrate()
3319 rtl8xxxu_write32(priv, REG_TX_IQK_TONE_A, 0x01008c00); in rtl8xxxu_phy_iqcalibrate()
3320 rtl8xxxu_write32(priv, REG_RX_IQK_TONE_A, 0x01008c00); in rtl8xxxu_phy_iqcalibrate()
3324 static void rtl8723a_phy_iq_calibrate(struct rtl8xxxu_priv *priv) in rtl8723a_phy_iq_calibrate() argument
3326 struct device *dev = &priv->udev->dev; in rtl8723a_phy_iq_calibrate()
3341 rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8723a_phy_iq_calibrate()
3344 rtl8xxxu_phy_iqcalibrate(priv, result, i); in rtl8723a_phy_iq_calibrate()
3347 simu = rtl8xxxu_simularity_compare(priv, result, 0, 1); in rtl8723a_phy_iq_calibrate()
3355 simu = rtl8xxxu_simularity_compare(priv, result, 0, 2); in rtl8723a_phy_iq_calibrate()
3361 simu = rtl8xxxu_simularity_compare(priv, result, 1, 2); in rtl8723a_phy_iq_calibrate()
3389 priv->rege94 = reg_e94; in rtl8723a_phy_iq_calibrate()
3391 priv->rege9c = reg_e9c; in rtl8723a_phy_iq_calibrate()
3395 priv->regeb4 = reg_eb4; in rtl8723a_phy_iq_calibrate()
3397 priv->regebc = reg_ebc; in rtl8723a_phy_iq_calibrate()
3408 reg_e94 = reg_eb4 = priv->rege94 = priv->regeb4 = 0x100; in rtl8723a_phy_iq_calibrate()
3409 reg_e9c = reg_ebc = priv->rege9c = priv->regebc = 0x0; in rtl8723a_phy_iq_calibrate()
3413 rtl8xxxu_fill_iqk_matrix_a(priv, path_a_ok, result, in rtl8723a_phy_iq_calibrate()
3416 if (priv->tx_paths > 1 && reg_eb4) in rtl8723a_phy_iq_calibrate()
3417 rtl8xxxu_fill_iqk_matrix_b(priv, path_b_ok, result, in rtl8723a_phy_iq_calibrate()
3420 rtl8xxxu_save_regs(priv, rtl8723au_iqk_phy_iq_bb_reg, in rtl8723a_phy_iq_calibrate()
3421 priv->bb_recovery_backup, RTL8XXXU_BB_REGS); in rtl8723a_phy_iq_calibrate()
3424 static void rtl8723a_phy_lc_calibrate(struct rtl8xxxu_priv *priv) in rtl8723a_phy_lc_calibrate() argument
3430 lstf = rtl8xxxu_read32(priv, REG_OFDM1_LSTF); in rtl8723a_phy_lc_calibrate()
3435 rtl8xxxu_write32(priv, REG_OFDM1_LSTF, val32); in rtl8723a_phy_lc_calibrate()
3438 rf_amode = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_AC); in rtl8723a_phy_lc_calibrate()
3441 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, in rtl8723a_phy_lc_calibrate()
3445 if (priv->tx_paths > 1) { in rtl8723a_phy_lc_calibrate()
3446 rf_bmode = rtl8xxxu_read_rfreg(priv, RF_B, in rtl8723a_phy_lc_calibrate()
3449 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_AC, in rtl8723a_phy_lc_calibrate()
3455 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8723a_phy_lc_calibrate()
3459 val32 = rtl8xxxu_read_rfreg(priv, RF_A, RF6052_REG_MODE_AG); in rtl8723a_phy_lc_calibrate()
3461 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_MODE_AG, val32); in rtl8723a_phy_lc_calibrate()
3468 rtl8xxxu_write32(priv, REG_OFDM1_LSTF, lstf); in rtl8723a_phy_lc_calibrate()
3469 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_AC, rf_amode); in rtl8723a_phy_lc_calibrate()
3472 if (priv->tx_paths > 1) in rtl8723a_phy_lc_calibrate()
3473 rtl8xxxu_write_rfreg(priv, RF_B, RF6052_REG_AC, in rtl8723a_phy_lc_calibrate()
3476 rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00); in rtl8723a_phy_lc_calibrate()
3479 static int rtl8xxxu_set_mac(struct rtl8xxxu_priv *priv) in rtl8xxxu_set_mac() argument
3487 rtl8xxxu_write8(priv, reg + i, priv->mac_addr[i]); in rtl8xxxu_set_mac()
3492 static int rtl8xxxu_set_bssid(struct rtl8xxxu_priv *priv, const u8 *bssid) in rtl8xxxu_set_bssid() argument
3497 dev_dbg(&priv->udev->dev, "%s: (%pM)\n", __func__, bssid); in rtl8xxxu_set_bssid()
3502 rtl8xxxu_write8(priv, reg + i, bssid[i]); in rtl8xxxu_set_bssid()
3508 rtl8xxxu_set_ampdu_factor(struct rtl8xxxu_priv *priv, u8 ampdu_factor) in rtl8xxxu_set_ampdu_factor() argument
3525 rtl8xxxu_write8(priv, REG_AGGLEN_LMT + i, vals[i]); in rtl8xxxu_set_ampdu_factor()
3529 static void rtl8xxxu_set_ampdu_min_space(struct rtl8xxxu_priv *priv, u8 density) in rtl8xxxu_set_ampdu_min_space() argument
3533 val8 = rtl8xxxu_read8(priv, REG_AMPDU_MIN_SPACE); in rtl8xxxu_set_ampdu_min_space()
3536 rtl8xxxu_write8(priv, REG_AMPDU_MIN_SPACE, val8); in rtl8xxxu_set_ampdu_min_space()
3539 static int rtl8xxxu_active_to_emu(struct rtl8xxxu_priv *priv) in rtl8xxxu_active_to_emu() argument
3547 rtl8xxxu_write8(priv, REG_RF_CTRL, 0); in rtl8xxxu_active_to_emu()
3550 val8 = rtl8xxxu_read8(priv, REG_LEDCFG2); in rtl8xxxu_active_to_emu()
3552 rtl8xxxu_write8(priv, REG_LEDCFG2, val8); in rtl8xxxu_active_to_emu()
3555 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_active_to_emu()
3557 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_active_to_emu()
3560 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_active_to_emu()
3567 dev_warn(&priv->udev->dev, "%s: Disabling MAC timed out\n", in rtl8xxxu_active_to_emu()
3574 val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL); in rtl8xxxu_active_to_emu()
3576 rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8); in rtl8xxxu_active_to_emu()
3579 val8 = rtl8xxxu_read8(priv, REG_LDOA15_CTRL); in rtl8xxxu_active_to_emu()
3581 rtl8xxxu_write8(priv, REG_LDOA15_CTRL, val8); in rtl8xxxu_active_to_emu()
3587 static int rtl8xxxu_active_to_lps(struct rtl8xxxu_priv *priv) in rtl8xxxu_active_to_lps() argument
3593 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8xxxu_active_to_lps()
3599 val32 = rtl8xxxu_read32(priv, 0x5f8); in rtl8xxxu_active_to_lps()
3606 dev_warn(&priv->udev->dev, in rtl8xxxu_active_to_lps()
3613 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC); in rtl8xxxu_active_to_lps()
3615 rtl8xxxu_write8(priv, REG_SYS_FUNC, val8); in rtl8xxxu_active_to_lps()
3620 val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC); in rtl8xxxu_active_to_lps()
3622 rtl8xxxu_write8(priv, REG_SYS_FUNC, val8); in rtl8xxxu_active_to_lps()
3625 val8 = rtl8xxxu_read8(priv, REG_CR); in rtl8xxxu_active_to_lps()
3627 rtl8xxxu_write8(priv, REG_CR, val8); in rtl8xxxu_active_to_lps()
3630 val8 = rtl8xxxu_read8(priv, REG_CR + 1); in rtl8xxxu_active_to_lps()
3632 rtl8xxxu_write8(priv, REG_CR + 1, val8); in rtl8xxxu_active_to_lps()
3635 val8 = rtl8xxxu_read8(priv, REG_DUAL_TSF_RST); in rtl8xxxu_active_to_lps()
3637 rtl8xxxu_write8(priv, REG_DUAL_TSF_RST, val8); in rtl8xxxu_active_to_lps()
3643 static void rtl8xxxu_disabled_to_emu(struct rtl8xxxu_priv *priv) in rtl8xxxu_disabled_to_emu() argument
3648 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_disabled_to_emu()
3650 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_disabled_to_emu()
3653 val8 = rtl8xxxu_read8(priv, REG_GPIO_INTM + 2); in rtl8xxxu_disabled_to_emu()
3655 rtl8xxxu_write8(priv, REG_GPIO_INTM + 2, val8); in rtl8xxxu_disabled_to_emu()
3658 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_disabled_to_emu()
3660 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_disabled_to_emu()
3663 static int rtl8xxxu_emu_to_active(struct rtl8xxxu_priv *priv) in rtl8xxxu_emu_to_active() argument
3670 val8 = rtl8xxxu_read8(priv, REG_LDOA15_CTRL); in rtl8xxxu_emu_to_active()
3672 rtl8xxxu_write8(priv, REG_LDOA15_CTRL, val8); in rtl8xxxu_emu_to_active()
3675 val8 = rtl8xxxu_read8(priv, 0x0067); in rtl8xxxu_emu_to_active()
3677 rtl8xxxu_write8(priv, 0x0067, val8); in rtl8xxxu_emu_to_active()
3682 val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL); in rtl8xxxu_emu_to_active()
3684 rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8); in rtl8xxxu_emu_to_active()
3687 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_emu_to_active()
3689 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_emu_to_active()
3693 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO); in rtl8xxxu_emu_to_active()
3708 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 2); in rtl8xxxu_emu_to_active()
3710 rtl8xxxu_write8(priv, REG_APS_FSMCO + 2, val8); in rtl8xxxu_emu_to_active()
3713 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_emu_to_active()
3715 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_emu_to_active()
3718 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_emu_to_active()
3720 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_emu_to_active()
3723 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO); in rtl8xxxu_emu_to_active()
3725 rtl8xxxu_write32(priv, REG_APS_FSMCO, val32); in rtl8xxxu_emu_to_active()
3728 val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO); in rtl8xxxu_emu_to_active()
3746 val8 = rtl8xxxu_read8(priv, REG_LEDCFG2); in rtl8xxxu_emu_to_active()
3749 rtl8xxxu_write8(priv, REG_LEDCFG2, val8); in rtl8xxxu_emu_to_active()
3755 static int rtl8xxxu_emu_to_disabled(struct rtl8xxxu_priv *priv) in rtl8xxxu_emu_to_disabled() argument
3760 rtl8xxxu_write8(priv, REG_APS_FSMCO + 3, 0x20); in rtl8xxxu_emu_to_disabled()
3763 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_emu_to_disabled()
3766 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_emu_to_disabled()
3768 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1); in rtl8xxxu_emu_to_disabled()
3770 rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8); in rtl8xxxu_emu_to_disabled()
3773 val8 = rtl8xxxu_read8(priv, REG_GPIO_INTM + 2); in rtl8xxxu_emu_to_disabled()
3775 rtl8xxxu_write8(priv, REG_GPIO_INTM + 2, val8); in rtl8xxxu_emu_to_disabled()
3780 static int rtl8723au_power_on(struct rtl8xxxu_priv *priv) in rtl8723au_power_on() argument
3790 rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0); in rtl8723au_power_on()
3792 rtl8xxxu_disabled_to_emu(priv); in rtl8723au_power_on()
3794 ret = rtl8xxxu_emu_to_active(priv); in rtl8723au_power_on()
3801 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 2); in rtl8723au_power_on()
3803 rtl8xxxu_write8(priv, REG_APS_FSMCO + 2, val8); in rtl8723au_power_on()
3809 val16 = rtl8xxxu_read16(priv, REG_CR); in rtl8723au_power_on()
3815 rtl8xxxu_write16(priv, REG_CR, val16); in rtl8723au_power_on()
3818 val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL); in rtl8723au_power_on()
3821 rtl8xxxu_write32(priv, REG_EFUSE_CTRL, val32); in rtl8723au_power_on()
3828 static int rtl8192cu_power_on(struct rtl8xxxu_priv *priv) in rtl8192cu_power_on() argument
3836 val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO); in rtl8192cu_power_on()
3849 rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0); in rtl8192cu_power_on()
3850 rtl8xxxu_write8(priv, REG_SPS0_CTRL, 0x2b); in rtl8192cu_power_on()
3853 val8 = rtl8xxxu_read8(priv, REG_LDOV12D_CTRL); in rtl8192cu_power_on()
3857 rtl8xxxu_write8(priv, REG_LDOV12D_CTRL, val8); in rtl8192cu_power_on()
3861 val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL); in rtl8192cu_power_on()
3863 rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8); in rtl8192cu_power_on()
3869 val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO); in rtl8192cu_power_on()
3871 rtl8xxxu_write16(priv, REG_APS_FSMCO, val16); in rtl8192cu_power_on()
3874 val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO); in rtl8192cu_power_on()
3888 rtl8xxxu_write16(priv, REG_APS_FSMCO, val16); in rtl8192cu_power_on()
3893 val16 = rtl8xxxu_read16(priv, REG_SYS_ISO_CTRL); in rtl8192cu_power_on()
3895 rtl8xxxu_write16(priv, REG_SYS_ISO_CTRL, val16); in rtl8192cu_power_on()
3897 val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL); in rtl8192cu_power_on()
3899 rtl8xxxu_write8(priv, REG_APSD_CTRL, val8); in rtl8192cu_power_on()
3901 val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL); in rtl8192cu_power_on()
3914 val16 = rtl8xxxu_read16(priv, REG_CR); in rtl8192cu_power_on()
3918 rtl8xxxu_write16(priv, REG_CR, val16); in rtl8192cu_power_on()
3923 if (priv->rtlchip == 0x8188c && priv->hi_pa) { in rtl8192cu_power_on()
3924 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM); in rtl8192cu_power_on()
3926 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32); in rtl8192cu_power_on()
3933 static void rtl8xxxu_power_off(struct rtl8xxxu_priv *priv) in rtl8xxxu_power_off() argument
3942 if (priv->rtlchip == 0x8188c && priv->hi_pa) { in rtl8xxxu_power_off()
3943 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM); in rtl8xxxu_power_off()
3945 rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32); in rtl8xxxu_power_off()
3948 rtl8xxxu_active_to_lps(priv); in rtl8xxxu_power_off()
3951 rtl8xxxu_write8(priv, REG_RF_CTRL, 0x00); in rtl8xxxu_power_off()
3954 if (rtl8xxxu_read8(priv, REG_MCU_FW_DL) & MCU_FW_RAM_SEL) in rtl8xxxu_power_off()
3955 rtl8xxxu_firmware_self_reset(priv); in rtl8xxxu_power_off()
3958 val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC); in rtl8xxxu_power_off()
3960 rtl8xxxu_write16(priv, REG_SYS_FUNC, val16); in rtl8xxxu_power_off()
3963 rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00); in rtl8xxxu_power_off()
3965 rtl8xxxu_active_to_emu(priv); in rtl8xxxu_power_off()
3966 rtl8xxxu_emu_to_disabled(priv); in rtl8xxxu_power_off()
3969 val8 = rtl8xxxu_read8(priv, REG_RSV_CTRL + 1); in rtl8xxxu_power_off()
3971 rtl8xxxu_write8(priv, REG_RSV_CTRL + 1, val8); in rtl8xxxu_power_off()
3973 val8 = rtl8xxxu_read8(priv, REG_RSV_CTRL + 1); in rtl8xxxu_power_off()
3975 rtl8xxxu_write8(priv, REG_RSV_CTRL + 1, val8); in rtl8xxxu_power_off()
3978 rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0e); in rtl8xxxu_power_off()
3981 static void rtl8xxxu_init_bt(struct rtl8xxxu_priv *priv) in rtl8xxxu_init_bt() argument
3983 if (!priv->has_bluetooth) in rtl8xxxu_init_bt()
3989 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_init_device() local
3990 struct device *dev = &priv->udev->dev; in rtl8xxxu_init_device()
3999 val8 = rtl8xxxu_read8(priv, REG_CR); in rtl8xxxu_init_device()
4010 ret = priv->fops->power_on(priv); in rtl8xxxu_init_device()
4018 ret = rtl8xxxu_init_llt_table(priv, TX_TOTAL_PAGE_NUM); in rtl8xxxu_init_device()
4025 ret = rtl8xxxu_download_firmware(priv); in rtl8xxxu_init_device()
4029 ret = rtl8xxxu_start_firmware(priv); in rtl8xxxu_init_device()
4034 ret = rtl8xxxu_init_mac(priv, rtl8723a_mac_init_table); in rtl8xxxu_init_device()
4039 ret = rtl8xxxu_init_phy_bb(priv); in rtl8xxxu_init_device()
4044 switch(priv->rtlchip) { in rtl8xxxu_init_device()
4047 ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); in rtl8xxxu_init_device()
4050 if (priv->hi_pa) in rtl8xxxu_init_device()
4054 ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); in rtl8xxxu_init_device()
4058 ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); in rtl8xxxu_init_device()
4062 ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); in rtl8xxxu_init_device()
4066 ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_B); in rtl8xxxu_init_device()
4076 rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, 0x0381808d); in rtl8xxxu_init_device()
4077 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff83); in rtl8xxxu_init_device()
4078 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff82); in rtl8xxxu_init_device()
4079 rtl8xxxu_write32(priv, REG_AFE_PLL_CTRL, 0xf0ffff83); in rtl8xxxu_init_device()
4082 rtl8xxxu_write32(priv, REG_FPGA0_TX_INFO, 0x00000003); in rtl8xxxu_init_device()
4088 rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_SW_CTRL, val32); in rtl8xxxu_init_device()
4090 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, 0x66F60210); in rtl8xxxu_init_device()
4092 priv->rf_mode_ag[0] = rtl8xxxu_read_rfreg(priv, RF_A, in rtl8xxxu_init_device()
4097 if (priv->ep_tx_normal_queue) in rtl8xxxu_init_device()
4102 rtl8xxxu_write8(priv, REG_RQPN_NPQ, val8); in rtl8xxxu_init_device()
4106 if (priv->ep_tx_high_queue) in rtl8xxxu_init_device()
4108 if (priv->ep_tx_low_queue) in rtl8xxxu_init_device()
4111 rtl8xxxu_write32(priv, REG_RQPN, val32); in rtl8xxxu_init_device()
4117 rtl8xxxu_write8(priv, REG_TXPKTBUF_BCNQ_BDNY, val8); in rtl8xxxu_init_device()
4118 rtl8xxxu_write8(priv, REG_TXPKTBUF_MGQ_BDNY, val8); in rtl8xxxu_init_device()
4119 rtl8xxxu_write8(priv, REG_TXPKTBUF_WMAC_LBK_BF_HD, val8); in rtl8xxxu_init_device()
4120 rtl8xxxu_write8(priv, REG_TRXFF_BNDY, val8); in rtl8xxxu_init_device()
4121 rtl8xxxu_write8(priv, REG_TDECTRL + 1, val8); in rtl8xxxu_init_device()
4124 ret = rtl8xxxu_init_queue_priority(priv); in rtl8xxxu_init_device()
4132 rtl8xxxu_write16(priv, REG_TRXFF_BNDY + 2, 0x27ff); in rtl8xxxu_init_device()
4138 rtl8xxxu_write8(priv, REG_PBP, val8); in rtl8xxxu_init_device()
4143 rtl8xxxu_write8(priv, REG_RX_DRVINFO_SZ, 4); in rtl8xxxu_init_device()
4148 rtl8xxxu_write32(priv, REG_HISR, 0xffffffff); in rtl8xxxu_init_device()
4149 rtl8xxxu_write32(priv, REG_HIMR, 0xffffffff); in rtl8xxxu_init_device()
4151 rtl8xxxu_set_mac(priv); in rtl8xxxu_init_device()
4152 rtl8xxxu_set_linktype(priv, NL80211_IFTYPE_STATION); in rtl8xxxu_init_device()
4161 rtl8xxxu_write32(priv, REG_RCR, val32); in rtl8xxxu_init_device()
4166 rtl8xxxu_write32(priv, REG_MAR, 0xffffffff); in rtl8xxxu_init_device()
4167 rtl8xxxu_write32(priv, REG_MAR + 4, 0xffffffff); in rtl8xxxu_init_device()
4172 val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET); in rtl8xxxu_init_device()
4175 rtl8xxxu_write32(priv, REG_RESPONSE_RATE_SET, val32); in rtl8xxxu_init_device()
4178 rtl8xxxu_set_spec_sifs(priv, 0x10, 0x10); in rtl8xxxu_init_device()
4179 rtl8xxxu_set_retry(priv, 0x30, 0x30); in rtl8xxxu_init_device()
4180 rtl8xxxu_set_spec_sifs(priv, 0x0a, 0x10); in rtl8xxxu_init_device()
4185 rtl8xxxu_write16(priv, REG_MAC_SPEC_SIFS, 0x100a); in rtl8xxxu_init_device()
4188 rtl8xxxu_write16(priv, REG_SIFS_CCK, 0x100a); in rtl8xxxu_init_device()
4191 rtl8xxxu_write16(priv, REG_SIFS_OFDM, 0x100a); in rtl8xxxu_init_device()
4194 rtl8xxxu_write32(priv, REG_EDCA_BE_PARAM, 0x005ea42b); in rtl8xxxu_init_device()
4195 rtl8xxxu_write32(priv, REG_EDCA_BK_PARAM, 0x0000a44f); in rtl8xxxu_init_device()
4196 rtl8xxxu_write32(priv, REG_EDCA_VI_PARAM, 0x005ea324); in rtl8xxxu_init_device()
4197 rtl8xxxu_write32(priv, REG_EDCA_VO_PARAM, 0x002fa226); in rtl8xxxu_init_device()
4200 rtl8xxxu_write32(priv, REG_DARFRC, 0x00000000); in rtl8xxxu_init_device()
4201 rtl8xxxu_write32(priv, REG_DARFRC + 4, 0x10080404); in rtl8xxxu_init_device()
4202 rtl8xxxu_write32(priv, REG_RARFRC, 0x04030201); in rtl8xxxu_init_device()
4203 rtl8xxxu_write32(priv, REG_RARFRC + 4, 0x08070605); in rtl8xxxu_init_device()
4205 val8 = rtl8xxxu_read8(priv, REG_FWHW_TXQ_CTRL); in rtl8xxxu_init_device()
4207 rtl8xxxu_write8(priv, REG_FWHW_TXQ_CTRL, val8); in rtl8xxxu_init_device()
4210 rtl8xxxu_write8(priv, REG_ACKTO, 0x40); in rtl8xxxu_init_device()
4216 rtl8xxxu_write16(priv, REG_BEACON_CTRL, val16); in rtl8xxxu_init_device()
4217 rtl8xxxu_write16(priv, REG_TBTT_PROHIBIT, 0x6404); in rtl8xxxu_init_device()
4218 rtl8xxxu_write8(priv, REG_DRIVER_EARLY_INT, DRIVER_EARLY_INT_TIME); in rtl8xxxu_init_device()
4219 rtl8xxxu_write8(priv, REG_BEACON_DMA_TIME, BEACON_DMA_ATIME_INT_TIME); in rtl8xxxu_init_device()
4220 rtl8xxxu_write16(priv, REG_BEACON_TCFG, 0x660F); in rtl8xxxu_init_device()
4225 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_init_device()
4227 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_init_device()
4232 rtl8xxxu_write32(priv, REG_CAM_CMD, CAM_CMD_POLLING | BIT(30)); in rtl8xxxu_init_device()
4237 rtl8723a_set_tx_power(priv, 1, false); in rtl8xxxu_init_device()
4240 val8 = rtl8xxxu_read8(priv, REG_LEDCFG2); in rtl8xxxu_init_device()
4242 rtl8xxxu_write8(priv, REG_LEDCFG2, val8); in rtl8xxxu_init_device()
4244 rtl8xxxu_write8(priv, REG_HWSEQ_CTRL, 0xff); in rtl8xxxu_init_device()
4247 rtl8xxxu_write32(priv, REG_BAR_MODE_CTRL, 0x0201ffff); in rtl8xxxu_init_device()
4249 rtl8xxxu_write16(priv, REG_FAST_EDCA_CTRL, 0); in rtl8xxxu_init_device()
4254 if (priv->iqk_initialized) { in rtl8xxxu_init_device()
4255 rtl8xxxu_restore_regs(priv, rtl8723au_iqk_phy_iq_bb_reg, in rtl8xxxu_init_device()
4256 priv->bb_recovery_backup, in rtl8xxxu_init_device()
4259 rtl8723a_phy_iq_calibrate(priv); in rtl8xxxu_init_device()
4260 priv->iqk_initialized = true; in rtl8xxxu_init_device()
4266 rtl8xxxu_write_rfreg(priv, RF_A, RF6052_REG_T_METER, 0x60); in rtl8xxxu_init_device()
4268 rtl8723a_phy_lc_calibrate(priv); in rtl8xxxu_init_device()
4271 rtl8xxxu_write8(priv, 0xfe40, 0xe0); in rtl8xxxu_init_device()
4272 rtl8xxxu_write8(priv, 0xfe41, 0x8d); in rtl8xxxu_init_device()
4273 rtl8xxxu_write8(priv, 0xfe42, 0x80); in rtl8xxxu_init_device()
4274 rtl8xxxu_write32(priv, REG_TXDMA_OFFSET_CHK, 0xfd0320); in rtl8xxxu_init_device()
4278 rtl8xxxu_write8(priv, 0xfe40, 0xe6); in rtl8xxxu_init_device()
4279 rtl8xxxu_write8(priv, 0xfe41, 0x94); in rtl8xxxu_init_device()
4280 rtl8xxxu_write8(priv, 0xfe42, 0x80); in rtl8xxxu_init_device()
4282 rtl8xxxu_write8(priv, 0xfe40, 0xe0); in rtl8xxxu_init_device()
4283 rtl8xxxu_write8(priv, 0xfe41, 0x19); in rtl8xxxu_init_device()
4284 rtl8xxxu_write8(priv, 0xfe42, 0x80); in rtl8xxxu_init_device()
4286 rtl8xxxu_write8(priv, 0xfe40, 0xe5); in rtl8xxxu_init_device()
4287 rtl8xxxu_write8(priv, 0xfe41, 0x91); in rtl8xxxu_init_device()
4288 rtl8xxxu_write8(priv, 0xfe42, 0x80); in rtl8xxxu_init_device()
4290 rtl8xxxu_write8(priv, 0xfe40, 0xe2); in rtl8xxxu_init_device()
4291 rtl8xxxu_write8(priv, 0xfe41, 0x81); in rtl8xxxu_init_device()
4292 rtl8xxxu_write8(priv, 0xfe42, 0x80); in rtl8xxxu_init_device()
4295 rtl8xxxu_init_bt(priv); in rtl8xxxu_init_device()
4301 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2); in rtl8xxxu_init_device()
4303 priv->path_a_hi_power = 1; in rtl8xxxu_init_device()
4305 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_init_device()
4306 priv->path_a_rf_paths = val32 & OFDM_RF_PATH_RX_MASK; in rtl8xxxu_init_device()
4308 val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1); in rtl8xxxu_init_device()
4309 priv->path_a_ig_value = val32 & OFDM0_X_AGC_CORE1_IGI_MASK; in rtl8xxxu_init_device()
4313 rtl8xxxu_write8(priv, REG_NAV_UPPER, val8); in rtl8xxxu_init_device()
4319 val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE); in rtl8xxxu_init_device()
4322 rtl8xxxu_write32(priv, REG_FPGA0_RF_MODE, val32); in rtl8xxxu_init_device()
4325 val32 = rtl8xxxu_read32(priv, REG_FWHW_TXQ_CTRL); in rtl8xxxu_init_device()
4328 rtl8xxxu_write32(priv, REG_FWHW_TXQ_CTRL, val32); in rtl8xxxu_init_device()
4336 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_disable_device() local
4338 rtl8xxxu_power_off(priv); in rtl8xxxu_disable_device()
4341 static void rtl8xxxu_cam_write(struct rtl8xxxu_priv *priv, in rtl8xxxu_cam_write() argument
4374 rtl8xxxu_write32(priv, REG_CAM_WRITE, val32); in rtl8xxxu_cam_write()
4376 rtl8xxxu_write32(priv, REG_CAM_CMD, cmd); in rtl8xxxu_cam_write()
4386 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_sw_scan_start() local
4389 val8 = rtl8xxxu_read8(priv, REG_BEACON_CTRL); in rtl8xxxu_sw_scan_start()
4391 rtl8xxxu_write8(priv, REG_BEACON_CTRL, val8); in rtl8xxxu_sw_scan_start()
4397 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_sw_scan_complete() local
4400 val8 = rtl8xxxu_read8(priv, REG_BEACON_CTRL); in rtl8xxxu_sw_scan_complete()
4402 rtl8xxxu_write8(priv, REG_BEACON_CTRL, val8); in rtl8xxxu_sw_scan_complete()
4405 static void rtl8xxxu_update_rate_mask(struct rtl8xxxu_priv *priv, in rtl8xxxu_update_rate_mask() argument
4418 dev_dbg(&priv->udev->dev, "%s: rate mask %08x, arg %02x\n", __func__, in rtl8xxxu_update_rate_mask()
4420 rtl8723a_h2c_cmd(priv, &h2c); in rtl8xxxu_update_rate_mask()
4423 static void rtl8xxxu_set_basic_rates(struct rtl8xxxu_priv *priv, u32 rate_cfg) in rtl8xxxu_set_basic_rates() argument
4430 val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET); in rtl8xxxu_set_basic_rates()
4433 rtl8xxxu_write32(priv, REG_RESPONSE_RATE_SET, val32); in rtl8xxxu_set_basic_rates()
4435 dev_dbg(&priv->udev->dev, "%s: rates %08x\n", __func__, rate_cfg); in rtl8xxxu_set_basic_rates()
4441 rtl8xxxu_write8(priv, REG_INIRTS_RATE_SEL, rate_idx); in rtl8xxxu_set_basic_rates()
4448 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_bss_info_changed() local
4449 struct device *dev = &priv->udev->dev; in rtl8xxxu_bss_info_changed()
4460 rtl8xxxu_set_linktype(priv, vif->type); in rtl8xxxu_bss_info_changed()
4489 rtl8xxxu_update_rate_mask(priv, ramask, sgi); in rtl8xxxu_bss_info_changed()
4491 val32 = rtl8xxxu_read32(priv, REG_RCR); in rtl8xxxu_bss_info_changed()
4493 rtl8xxxu_write32(priv, REG_RCR, val32); in rtl8xxxu_bss_info_changed()
4496 rtl8xxxu_write16(priv, REG_RXFLTMAP2, 0xffff); in rtl8xxxu_bss_info_changed()
4498 rtl8xxxu_write8(priv, REG_BCN_MAX_ERR, 0xff); in rtl8xxxu_bss_info_changed()
4500 rtl8723a_stop_tx_beacon(priv); in rtl8xxxu_bss_info_changed()
4503 rtl8xxxu_write16(priv, REG_BCN_PSR_RPT, in rtl8xxxu_bss_info_changed()
4508 val32 = rtl8xxxu_read32(priv, REG_RCR); in rtl8xxxu_bss_info_changed()
4511 rtl8xxxu_write32(priv, REG_RCR, val32); in rtl8xxxu_bss_info_changed()
4513 val8 = rtl8xxxu_read8(priv, REG_BEACON_CTRL); in rtl8xxxu_bss_info_changed()
4515 rtl8xxxu_write8(priv, REG_BEACON_CTRL, val8); in rtl8xxxu_bss_info_changed()
4518 rtl8xxxu_write16(priv, REG_RXFLTMAP2, 0x0000); in rtl8xxxu_bss_info_changed()
4522 rtl8723a_h2c_cmd(priv, &h2c); in rtl8xxxu_bss_info_changed()
4528 val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET); in rtl8xxxu_bss_info_changed()
4533 rtl8xxxu_write32(priv, REG_RESPONSE_RATE_SET, val32); in rtl8xxxu_bss_info_changed()
4544 rtl8xxxu_write8(priv, REG_SLOT, val8); in rtl8xxxu_bss_info_changed()
4549 rtl8xxxu_set_bssid(priv, bss_conf->bssid); in rtl8xxxu_bss_info_changed()
4554 rtl8xxxu_set_basic_rates(priv, bss_conf->basic_rates); in rtl8xxxu_bss_info_changed()
4615 static void rtl8xxxu_free_tx_resources(struct rtl8xxxu_priv *priv) in rtl8xxxu_free_tx_resources() argument
4620 spin_lock_irqsave(&priv->tx_urb_lock, flags); in rtl8xxxu_free_tx_resources()
4621 list_for_each_entry_safe(tx_urb, tmp, &priv->tx_urb_free_list, list) { in rtl8xxxu_free_tx_resources()
4623 priv->tx_urb_free_count--; in rtl8xxxu_free_tx_resources()
4626 spin_unlock_irqrestore(&priv->tx_urb_lock, flags); in rtl8xxxu_free_tx_resources()
4630 rtl8xxxu_alloc_tx_urb(struct rtl8xxxu_priv *priv) in rtl8xxxu_alloc_tx_urb() argument
4635 spin_lock_irqsave(&priv->tx_urb_lock, flags); in rtl8xxxu_alloc_tx_urb()
4636 tx_urb = list_first_entry_or_null(&priv->tx_urb_free_list, in rtl8xxxu_alloc_tx_urb()
4640 priv->tx_urb_free_count--; in rtl8xxxu_alloc_tx_urb()
4641 if (priv->tx_urb_free_count < RTL8XXXU_TX_URB_LOW_WATER && in rtl8xxxu_alloc_tx_urb()
4642 !priv->tx_stopped) { in rtl8xxxu_alloc_tx_urb()
4643 priv->tx_stopped = true; in rtl8xxxu_alloc_tx_urb()
4644 ieee80211_stop_queues(priv->hw); in rtl8xxxu_alloc_tx_urb()
4648 spin_unlock_irqrestore(&priv->tx_urb_lock, flags); in rtl8xxxu_alloc_tx_urb()
4653 static void rtl8xxxu_free_tx_urb(struct rtl8xxxu_priv *priv, in rtl8xxxu_free_tx_urb() argument
4660 spin_lock_irqsave(&priv->tx_urb_lock, flags); in rtl8xxxu_free_tx_urb()
4662 list_add(&tx_urb->list, &priv->tx_urb_free_list); in rtl8xxxu_free_tx_urb()
4663 priv->tx_urb_free_count++; in rtl8xxxu_free_tx_urb()
4664 if (priv->tx_urb_free_count > RTL8XXXU_TX_URB_HIGH_WATER && in rtl8xxxu_free_tx_urb()
4665 priv->tx_stopped) { in rtl8xxxu_free_tx_urb()
4666 priv->tx_stopped = false; in rtl8xxxu_free_tx_urb()
4667 ieee80211_wake_queues(priv->hw); in rtl8xxxu_free_tx_urb()
4670 spin_unlock_irqrestore(&priv->tx_urb_lock, flags); in rtl8xxxu_free_tx_urb()
4695 rtl8xxxu_free_tx_urb(hw->priv, tx_urb); in rtl8xxxu_tx_complete()
4744 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_tx() local
4749 struct device *dev = &priv->udev->dev; in rtl8xxxu_tx()
4769 tx_urb = rtl8xxxu_alloc_tx_urb(priv); in rtl8xxxu_tx()
4871 usb_fill_bulk_urb(&tx_urb->urb, priv->udev, priv->pipe_out[queue], in rtl8xxxu_tx()
4874 usb_anchor_urb(&tx_urb->urb, &priv->tx_anchor); in rtl8xxxu_tx()
4878 rtl8xxxu_free_tx_urb(priv, tx_urb); in rtl8xxxu_tx()
4886 static void rtl8xxxu_rx_parse_phystats(struct rtl8xxxu_priv *priv, in rtl8xxxu_rx_parse_phystats() argument
4920 static void rtl8xxxu_free_rx_resources(struct rtl8xxxu_priv *priv) in rtl8xxxu_free_rx_resources() argument
4925 spin_lock_irqsave(&priv->rx_urb_lock, flags); in rtl8xxxu_free_rx_resources()
4928 &priv->rx_urb_pending_list, list) { in rtl8xxxu_free_rx_resources()
4930 priv->rx_urb_pending_count--; in rtl8xxxu_free_rx_resources()
4934 spin_unlock_irqrestore(&priv->rx_urb_lock, flags); in rtl8xxxu_free_rx_resources()
4937 static void rtl8xxxu_queue_rx_urb(struct rtl8xxxu_priv *priv, in rtl8xxxu_queue_rx_urb() argument
4944 spin_lock_irqsave(&priv->rx_urb_lock, flags); in rtl8xxxu_queue_rx_urb()
4946 if (!priv->shutdown) { in rtl8xxxu_queue_rx_urb()
4947 list_add_tail(&rx_urb->list, &priv->rx_urb_pending_list); in rtl8xxxu_queue_rx_urb()
4948 priv->rx_urb_pending_count++; in rtl8xxxu_queue_rx_urb()
4949 pending = priv->rx_urb_pending_count; in rtl8xxxu_queue_rx_urb()
4956 spin_unlock_irqrestore(&priv->rx_urb_lock, flags); in rtl8xxxu_queue_rx_urb()
4959 schedule_work(&priv->rx_urb_wq); in rtl8xxxu_queue_rx_urb()
4964 struct rtl8xxxu_priv *priv; in rtl8xxxu_rx_urb_work() local
4971 priv = container_of(work, struct rtl8xxxu_priv, rx_urb_wq); in rtl8xxxu_rx_urb_work()
4974 spin_lock_irqsave(&priv->rx_urb_lock, flags); in rtl8xxxu_rx_urb_work()
4976 list_splice_init(&priv->rx_urb_pending_list, &local); in rtl8xxxu_rx_urb_work()
4977 priv->rx_urb_pending_count = 0; in rtl8xxxu_rx_urb_work()
4979 spin_unlock_irqrestore(&priv->rx_urb_lock, flags); in rtl8xxxu_rx_urb_work()
4983 ret = rtl8xxxu_submit_rx_urb(priv, rx_urb); in rtl8xxxu_rx_urb_work()
4994 rtl8xxxu_queue_rx_urb(priv, rx_urb); in rtl8xxxu_rx_urb_work()
5010 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_rx_complete() local
5016 struct device *dev = &priv->udev->dev; in rtl8xxxu_rx_complete()
5041 rtl8xxxu_rx_parse_phystats(priv, rx_status, in rtl8xxxu_rx_complete()
5067 rtl8xxxu_queue_rx_urb(priv, rx_urb); in rtl8xxxu_rx_complete()
5080 static int rtl8xxxu_submit_rx_urb(struct rtl8xxxu_priv *priv, in rtl8xxxu_submit_rx_urb() argument
5093 usb_fill_bulk_urb(&rx_urb->urb, priv->udev, priv->pipe_in, skb->data, in rtl8xxxu_submit_rx_urb()
5095 usb_anchor_urb(&rx_urb->urb, &priv->rx_anchor); in rtl8xxxu_submit_rx_urb()
5104 struct rtl8xxxu_priv *priv = (struct rtl8xxxu_priv *)urb->context; in rtl8xxxu_int_complete() local
5105 struct device *dev = &priv->udev->dev; in rtl8xxxu_int_complete()
5110 usb_anchor_urb(urb, &priv->int_anchor); in rtl8xxxu_int_complete()
5122 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_submit_int_urb() local
5131 usb_fill_int_urb(urb, priv->udev, priv->pipe_interrupt, in rtl8xxxu_submit_int_urb()
5132 priv->int_buf, USB_INTR_CONTENT_LENGTH, in rtl8xxxu_submit_int_urb()
5133 rtl8xxxu_int_complete, priv, 1); in rtl8xxxu_submit_int_urb()
5134 usb_anchor_urb(urb, &priv->int_anchor); in rtl8xxxu_submit_int_urb()
5141 val32 = rtl8xxxu_read32(priv, REG_USB_HIMR); in rtl8xxxu_submit_int_urb()
5143 rtl8xxxu_write32(priv, REG_USB_HIMR, val32); in rtl8xxxu_submit_int_urb()
5152 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_add_interface() local
5158 rtl8723a_stop_tx_beacon(priv); in rtl8xxxu_add_interface()
5160 val8 = rtl8xxxu_read8(priv, REG_BEACON_CTRL); in rtl8xxxu_add_interface()
5163 rtl8xxxu_write8(priv, REG_BEACON_CTRL, val8); in rtl8xxxu_add_interface()
5170 rtl8xxxu_set_linktype(priv, vif->type); in rtl8xxxu_add_interface()
5178 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_remove_interface() local
5180 dev_dbg(&priv->udev->dev, "%s\n", __func__); in rtl8xxxu_remove_interface()
5185 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_config() local
5186 struct device *dev = &priv->udev->dev; in rtl8xxxu_config()
5202 rtl8xxxu_write16(priv, REG_RETRY_LIMIT, val16); in rtl8xxxu_config()
5221 rtl8723a_set_tx_power(priv, channel, ht40); in rtl8xxxu_config()
5234 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_conf_tx() local
5235 struct device *dev = &priv->udev->dev; in rtl8xxxu_conf_tx()
5246 acm_ctrl = rtl8xxxu_read8(priv, REG_ACM_HW_CTRL); in rtl8xxxu_conf_tx()
5254 rtl8xxxu_write32(priv, REG_EDCA_VO_PARAM, val32); in rtl8xxxu_conf_tx()
5258 rtl8xxxu_write32(priv, REG_EDCA_VI_PARAM, val32); in rtl8xxxu_conf_tx()
5262 rtl8xxxu_write32(priv, REG_EDCA_BE_PARAM, val32); in rtl8xxxu_conf_tx()
5266 rtl8xxxu_write32(priv, REG_EDCA_BK_PARAM, val32); in rtl8xxxu_conf_tx()
5277 rtl8xxxu_write8(priv, REG_ACM_HW_CTRL, acm_ctrl); in rtl8xxxu_conf_tx()
5286 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_configure_filter() local
5288 dev_dbg(&priv->udev->dev, "%s: changed_flags %08x, total_flags %08x\n", in rtl8xxxu_configure_filter()
5307 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_set_key() local
5308 struct device *dev = &priv->udev->dev; in rtl8xxxu_set_key()
5346 val16 = rtl8xxxu_read16(priv, REG_CR); in rtl8xxxu_set_key()
5348 rtl8xxxu_write16(priv, REG_CR, val16); in rtl8xxxu_set_key()
5353 rtl8xxxu_write8(priv, REG_SECURITY_CFG, val8); in rtl8xxxu_set_key()
5359 rtl8xxxu_cam_write(priv, key, mac_addr); in rtl8xxxu_set_key()
5363 rtl8xxxu_write32(priv, REG_CAM_WRITE, 0x00000000); in rtl8xxxu_set_key()
5366 rtl8xxxu_write32(priv, REG_CAM_CMD, val32); in rtl8xxxu_set_key()
5382 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_ampdu_action() local
5383 struct device *dev = &priv->udev->dev; in rtl8xxxu_ampdu_action()
5391 rtl8xxxu_set_ampdu_factor(priv, ampdu_factor); in rtl8xxxu_ampdu_action()
5392 rtl8xxxu_set_ampdu_min_space(priv, ampdu_density); in rtl8xxxu_ampdu_action()
5399 rtl8xxxu_set_ampdu_factor(priv, 0); in rtl8xxxu_ampdu_action()
5400 rtl8xxxu_set_ampdu_min_space(priv, 0); in rtl8xxxu_ampdu_action()
5405 rtl8xxxu_set_ampdu_factor(priv, 0); in rtl8xxxu_ampdu_action()
5406 rtl8xxxu_set_ampdu_min_space(priv, 0); in rtl8xxxu_ampdu_action()
5422 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_start() local
5430 init_usb_anchor(&priv->rx_anchor); in rtl8xxxu_start()
5431 init_usb_anchor(&priv->tx_anchor); in rtl8xxxu_start()
5432 init_usb_anchor(&priv->int_anchor); in rtl8xxxu_start()
5434 rtl8723a_enable_rf(priv); in rtl8xxxu_start()
5450 list_add(&tx_urb->list, &priv->tx_urb_free_list); in rtl8xxxu_start()
5451 priv->tx_urb_free_count++; in rtl8xxxu_start()
5454 priv->tx_stopped = false; in rtl8xxxu_start()
5456 spin_lock_irqsave(&priv->rx_urb_lock, flags); in rtl8xxxu_start()
5457 priv->shutdown = false; in rtl8xxxu_start()
5458 spin_unlock_irqrestore(&priv->rx_urb_lock, flags); in rtl8xxxu_start()
5472 ret = rtl8xxxu_submit_rx_urb(priv, rx_urb); in rtl8xxxu_start()
5478 rtl8xxxu_write16(priv, REG_RXFLTMAP2, 0x0000); in rtl8xxxu_start()
5482 rtl8xxxu_write16(priv, REG_RXFLTMAP0, 0xffff); in rtl8xxxu_start()
5484 rtl8xxxu_write32(priv, REG_OFDM0_XA_AGC_CORE1, 0x6954341e); in rtl8xxxu_start()
5489 rtl8xxxu_free_tx_resources(priv); in rtl8xxxu_start()
5493 rtl8xxxu_write16(priv, REG_RXFLTMAP2, 0x0000); in rtl8xxxu_start()
5494 rtl8xxxu_write16(priv, REG_RXFLTMAP0, 0x0000); in rtl8xxxu_start()
5501 struct rtl8xxxu_priv *priv = hw->priv; in rtl8xxxu_stop() local
5504 rtl8xxxu_write8(priv, REG_TXPAUSE, 0xff); in rtl8xxxu_stop()
5506 rtl8xxxu_write16(priv, REG_RXFLTMAP0, 0x0000); in rtl8xxxu_stop()
5507 rtl8xxxu_write16(priv, REG_RXFLTMAP2, 0x0000); in rtl8xxxu_stop()
5509 spin_lock_irqsave(&priv->rx_urb_lock, flags); in rtl8xxxu_stop()
5510 priv->shutdown = true; in rtl8xxxu_stop()
5511 spin_unlock_irqrestore(&priv->rx_urb_lock, flags); in rtl8xxxu_stop()
5513 usb_kill_anchored_urbs(&priv->rx_anchor); in rtl8xxxu_stop()
5514 usb_kill_anchored_urbs(&priv->tx_anchor); in rtl8xxxu_stop()
5515 usb_kill_anchored_urbs(&priv->int_anchor); in rtl8xxxu_stop()
5517 rtl8723a_disable_rf(priv); in rtl8xxxu_stop()
5522 rtl8xxxu_write32(priv, REG_USB_HIMR, 0); in rtl8xxxu_stop()
5524 rtl8xxxu_free_rx_resources(priv); in rtl8xxxu_stop()
5525 rtl8xxxu_free_tx_resources(priv); in rtl8xxxu_stop()
5545 static int rtl8xxxu_parse_usb(struct rtl8xxxu_priv *priv, in rtl8xxxu_parse_usb() argument
5551 struct device *dev = &priv->udev->dev; in rtl8xxxu_parse_usb()
5576 if (priv->pipe_in) { in rtl8xxxu_parse_usb()
5583 priv->pipe_in = usb_rcvbulkpipe(priv->udev, num); in rtl8xxxu_parse_usb()
5592 if (priv->pipe_interrupt) { in rtl8xxxu_parse_usb()
5599 priv->pipe_interrupt = usb_rcvintpipe(priv->udev, num); in rtl8xxxu_parse_usb()
5613 priv->out_ep[j++] = num; in rtl8xxxu_parse_usb()
5617 priv->nr_out_eps = j; in rtl8xxxu_parse_usb()
5624 struct rtl8xxxu_priv *priv; in rtl8xxxu_probe() local
5667 priv = hw->priv; in rtl8xxxu_probe()
5668 priv->hw = hw; in rtl8xxxu_probe()
5669 priv->udev = udev; in rtl8xxxu_probe()
5670 priv->fops = (struct rtl8xxxu_fileops *)id->driver_info; in rtl8xxxu_probe()
5671 mutex_init(&priv->usb_buf_mutex); in rtl8xxxu_probe()
5672 mutex_init(&priv->h2c_mutex); in rtl8xxxu_probe()
5673 INIT_LIST_HEAD(&priv->tx_urb_free_list); in rtl8xxxu_probe()
5674 spin_lock_init(&priv->tx_urb_lock); in rtl8xxxu_probe()
5675 INIT_LIST_HEAD(&priv->rx_urb_pending_list); in rtl8xxxu_probe()
5676 spin_lock_init(&priv->rx_urb_lock); in rtl8xxxu_probe()
5677 INIT_WORK(&priv->rx_urb_wq, rtl8xxxu_rx_urb_work); in rtl8xxxu_probe()
5681 ret = rtl8xxxu_parse_usb(priv, interface); in rtl8xxxu_probe()
5685 ret = rtl8xxxu_identify_chip(priv); in rtl8xxxu_probe()
5691 ret = rtl8xxxu_read_efuse(priv); in rtl8xxxu_probe()
5697 ret = priv->fops->parse_efuse(priv); in rtl8xxxu_probe()
5703 rtl8xxxu_print_chipinfo(priv); in rtl8xxxu_probe()
5705 ret = priv->fops->load_firmware(priv); in rtl8xxxu_probe()
5726 if (priv->rf_paths > 1) { in rtl8xxxu_probe()
5744 SET_IEEE80211_DEV(priv->hw, &interface->dev); in rtl8xxxu_probe()
5745 SET_IEEE80211_PERM_ADDR(hw, priv->mac_addr); in rtl8xxxu_probe()
5755 ret = ieee80211_register_hw(priv->hw); in rtl8xxxu_probe()
5770 struct rtl8xxxu_priv *priv; in rtl8xxxu_disconnect() local
5774 priv = hw->priv; in rtl8xxxu_disconnect()
5779 dev_info(&priv->udev->dev, "disconnecting\n"); in rtl8xxxu_disconnect()
5783 kfree(priv->fw_data); in rtl8xxxu_disconnect()
5784 mutex_destroy(&priv->usb_buf_mutex); in rtl8xxxu_disconnect()
5785 mutex_destroy(&priv->h2c_mutex); in rtl8xxxu_disconnect()
5787 usb_put_dev(priv->udev); in rtl8xxxu_disconnect()