1011 static u32 rtl8xxxu_read32(struct rtl8xxxu_priv *priv, u16 addr)  in rtl8xxxu_read32()  function
1134 	hssia = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2);  in rtl8xxxu_read_rfreg()
1136 		val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm2);  in rtl8xxxu_read_rfreg()
1155 	val32 = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hssiparm1);  in rtl8xxxu_read_rfreg()
1157 		retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].hspiread);  in rtl8xxxu_read_rfreg()
1159 		retval = rtl8xxxu_read32(priv, rtl8xxxu_rfregs[path].lssiread);  in rtl8xxxu_read_rfreg()
1253 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XAB_RF_PARM);  in rtl8723a_enable_rf()
1262 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);  in rtl8723a_enable_rf()
1272 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8723a_enable_rf()
1298 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XAB_RF_PARM);  in rtl8723a_disable_rf()
1305 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);  in rtl8723a_disable_rf()
1310 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8723a_disable_rf()
1378 	rsr = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET);  in rtl8723au_config_channel()
1388 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8723au_config_channel()
1392 		val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE);  in rtl8723au_config_channel()
1396 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_ANALOG2);  in rtl8723au_config_channel()
1419 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8723au_config_channel()
1423 		val32 = rtl8xxxu_read32(priv, REG_FPGA1_RF_MODE);  in rtl8723au_config_channel()
1431 		val32 = rtl8xxxu_read32(priv, REG_CCK0_SYSTEM);  in rtl8723au_config_channel()
1437 		val32 = rtl8xxxu_read32(priv, REG_OFDM1_LSTF);  in rtl8723au_config_channel()
1445 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_ANALOG2);  in rtl8723au_config_channel()
1449 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_POWER_SAVE);  in rtl8723au_config_channel()
1537 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_A_CCK1_MCS32);  in rtl8723a_set_tx_power()
1542 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);  in rtl8723a_set_tx_power()
1547 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK11_A_CCK2_11);  in rtl8723a_set_tx_power()
1552 	val32 = rtl8xxxu_read32(priv, REG_TX_AGC_B_CCK1_55_MCS32);  in rtl8723a_set_tx_power()
1685 	val32 = rtl8xxxu_read32(priv, REG_SYS_CFG);  in rtl8xxxu_identify_chip()
1700 		val32 = rtl8xxxu_read32(priv, REG_MULTI_FUNC_CTRL);  in rtl8xxxu_identify_chip()
1708 		bonding = rtl8xxxu_read32(priv, REG_HPON_FSM);  in rtl8xxxu_identify_chip()
1736 	val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);  in rtl8xxxu_identify_chip()
1910 	val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL);  in rtl8xxxu_read_efuse8()
1912 		val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL);  in rtl8xxxu_read_efuse8()
1921 	val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL);  in rtl8xxxu_read_efuse8()
1941 	val32 = rtl8xxxu_read32(priv, REG_EFUSE_TEST);  in rtl8xxxu_read_efuse()
2054 		val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL);  in rtl8xxxu_start_firmware()
2065 	val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL);  in rtl8xxxu_start_firmware()
2072 		val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL);  in rtl8xxxu_start_firmware()
2110 	val32 = rtl8xxxu_read32(priv, REG_MCU_FW_DL);  in rtl8xxxu_download_firmware()
2352 	val32 = rtl8xxxu_read32(priv, REG_AFE_XTAL_CTRL);  in rtl8xxxu_init_phy_bb()
2380 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_TX_INFO);  in rtl8xxxu_init_phy_bb()
2385 		val32 = rtl8xxxu_read32(priv, REG_FPGA1_TX_INFO);  in rtl8xxxu_init_phy_bb()
2390 		val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);  in rtl8xxxu_init_phy_bb()
2395 		val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);  in rtl8xxxu_init_phy_bb()
2401 		val32 = rtl8xxxu_read32(priv, REG_OFDM0_AGC_PARM1);  in rtl8xxxu_init_phy_bb()
2406 		val32 = rtl8xxxu_read32(priv, REG_TX_CCK_RFON);  in rtl8xxxu_init_phy_bb()
2411 		val32 = rtl8xxxu_read32(priv, REG_TX_CCK_BBON);  in rtl8xxxu_init_phy_bb()
2416 		val32 = rtl8xxxu_read32(priv, REG_TX_OFDM_RFON);  in rtl8xxxu_init_phy_bb()
2421 		val32 = rtl8xxxu_read32(priv, REG_TX_OFDM_BBON);  in rtl8xxxu_init_phy_bb()
2426 		val32 = rtl8xxxu_read32(priv, REG_TX_TO_TX);  in rtl8xxxu_init_phy_bb()
2439 		val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL);  in rtl8xxxu_init_phy_bb()
2540 	val32 = rtl8xxxu_read32(priv, reg_int_oe);  in rtl8xxxu_init_phy_rf()
2545 	val32 = rtl8xxxu_read32(priv, reg_int_oe);  in rtl8xxxu_init_phy_rf()
2553 	val32 = rtl8xxxu_read32(priv, reg_hssi_parm2);  in rtl8xxxu_init_phy_rf()
2558 	val32 = rtl8xxxu_read32(priv, reg_hssi_parm2);  in rtl8xxxu_init_phy_rf()
2585 		value = rtl8xxxu_read32(priv, REG_LLT_INIT);  in rtl8xxxu_llt_write()
2756 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_a()
2764 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_a()
2769 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES);  in rtl8xxxu_fill_iqk_matrix_a()
2780 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XC_TX_AFE);  in rtl8xxxu_fill_iqk_matrix_a()
2785 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_TX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_a()
2790 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES);  in rtl8xxxu_fill_iqk_matrix_a()
2803 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_a()
2810 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_RX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_a()
2817 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_RX_IQ_EXT_ANTA);  in rtl8xxxu_fill_iqk_matrix_a()
2834 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_b()
2842 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_b()
2847 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES);  in rtl8xxxu_fill_iqk_matrix_b()
2858 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XD_TX_AFE);  in rtl8xxxu_fill_iqk_matrix_b()
2863 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_TX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_b()
2868 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_ENERGY_CCA_THRES);  in rtl8xxxu_fill_iqk_matrix_b()
2881 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_RX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_b()
2888 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XB_RX_IQ_IMBALANCE);  in rtl8xxxu_fill_iqk_matrix_b()
2895 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_AGCR_SSI_TABLE);  in rtl8xxxu_fill_iqk_matrix_b()
2965 	backup[i] = rtl8xxxu_read32(priv, reg[i]);  in rtl8xxxu_save_mac_regs()
2985 		backup[i] = rtl8xxxu_read32(priv, regs[i]);  in rtl8xxxu_save_regs()
3062 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8xxxu_iqk_path_a()
3063 	reg_e94 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_A);  in rtl8xxxu_iqk_path_a()
3064 	reg_e9c = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_A);  in rtl8xxxu_iqk_path_a()
3065 	reg_ea4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_A_2);  in rtl8xxxu_iqk_path_a()
3098 	reg_eac = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_A_2);  in rtl8xxxu_iqk_path_b()
3099 	reg_eb4 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);  in rtl8xxxu_iqk_path_b()
3100 	reg_ebc = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);  in rtl8xxxu_iqk_path_b()
3101 	reg_ec4 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_B_2);  in rtl8xxxu_iqk_path_b()
3102 	reg_ecc = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_B_2);  in rtl8xxxu_iqk_path_b()
3167 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM1);  in rtl8xxxu_phy_iqcalibrate()
3178 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8xxxu_phy_iqcalibrate()
3186 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XAB_RF_SW_CTRL);  in rtl8xxxu_phy_iqcalibrate()
3190 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE);  in rtl8xxxu_phy_iqcalibrate()
3193 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_RF_INT_OE);  in rtl8xxxu_phy_iqcalibrate()
3219 			val32 = rtl8xxxu_read32(priv,  in rtl8xxxu_phy_iqcalibrate()
3222 			val32 = rtl8xxxu_read32(priv,  in rtl8xxxu_phy_iqcalibrate()
3225 			val32 = rtl8xxxu_read32(priv,  in rtl8xxxu_phy_iqcalibrate()
3228 			val32 = rtl8xxxu_read32(priv,  in rtl8xxxu_phy_iqcalibrate()
3237 			val32 = rtl8xxxu_read32(priv,  in rtl8xxxu_phy_iqcalibrate()
3240 			val32 = rtl8xxxu_read32(priv,  in rtl8xxxu_phy_iqcalibrate()
3263 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);  in rtl8xxxu_phy_iqcalibrate()
3265 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);  in rtl8xxxu_phy_iqcalibrate()
3267 				val32 = rtl8xxxu_read32(priv, REG_RX_POWER_BEFORE_IQK_B_2);  in rtl8xxxu_phy_iqcalibrate()
3269 				val32 = rtl8xxxu_read32(priv, REG_RX_POWER_AFTER_IQK_B_2);  in rtl8xxxu_phy_iqcalibrate()
3274 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_BEFORE_IQK_B);  in rtl8xxxu_phy_iqcalibrate()
3276 				val32 = rtl8xxxu_read32(priv, REG_TX_POWER_AFTER_IQK_B);  in rtl8xxxu_phy_iqcalibrate()
3341 	rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8723a_phy_iq_calibrate()
3430 	lstf = rtl8xxxu_read32(priv, REG_OFDM1_LSTF);  in rtl8723a_phy_lc_calibrate()
3599 		val32 = rtl8xxxu_read32(priv, 0x5f8);  in rtl8xxxu_active_to_lps()
3693 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8xxxu_emu_to_active()
3723 	val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8xxxu_emu_to_active()
3728 		val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);  in rtl8xxxu_emu_to_active()
3818 	val32 = rtl8xxxu_read32(priv, REG_EFUSE_CTRL);  in rtl8723au_power_on()
3924 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM);  in rtl8192cu_power_on()
3943 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM);  in rtl8xxxu_power_off()
4172 	val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET);  in rtl8xxxu_init_device()
4225 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8xxxu_init_device()
4301 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2);  in rtl8xxxu_init_device()
4305 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);  in rtl8xxxu_init_device()
4308 	val32 = rtl8xxxu_read32(priv, REG_OFDM0_XA_AGC_CORE1);  in rtl8xxxu_init_device()
4319 	val32 = rtl8xxxu_read32(priv, REG_FPGA0_RF_MODE);  in rtl8xxxu_init_device()
4325 	val32 = rtl8xxxu_read32(priv, REG_FWHW_TXQ_CTRL);  in rtl8xxxu_init_device()
4430 	val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET);  in rtl8xxxu_set_basic_rates()
4491 			val32 = rtl8xxxu_read32(priv, REG_RCR);  in rtl8xxxu_bss_info_changed()
4508 			val32 = rtl8xxxu_read32(priv, REG_RCR);  in rtl8xxxu_bss_info_changed()
4528 		val32 = rtl8xxxu_read32(priv, REG_RESPONSE_RATE_SET);  in rtl8xxxu_bss_info_changed()
5141 	val32 = rtl8xxxu_read32(priv, REG_USB_HIMR);  in rtl8xxxu_submit_int_urb()