Lines Matching refs:rt2x00mmio_register_read

141 	rt2x00mmio_register_read(rt2x00dev, CSR21, &reg);  in rt2400pci_eepromregister_read()
170 		.read		= rt2x00mmio_register_read,
205 	rt2x00mmio_register_read(rt2x00dev, GPIOCSR, &reg);  in rt2400pci_rfkill_poll()
218 	rt2x00mmio_register_read(led->rt2x00dev, LEDCSR, &reg);  in rt2400pci_brightness_set()
236 	rt2x00mmio_register_read(led->rt2x00dev, LEDCSR, &reg);  in rt2400pci_blink_set()
269 	rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2400pci_config_filter()
296 		rt2x00mmio_register_read(rt2x00dev, BCNCSR1, &reg);  in rt2400pci_config_intf()
303 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_config_intf()
331 		rt2x00mmio_register_read(rt2x00dev, TXCSR1, &reg);  in rt2400pci_config_erp()
338 		rt2x00mmio_register_read(rt2x00dev, ARCSR2, &reg);  in rt2400pci_config_erp()
345 		rt2x00mmio_register_read(rt2x00dev, ARCSR3, &reg);  in rt2400pci_config_erp()
352 		rt2x00mmio_register_read(rt2x00dev, ARCSR4, &reg);  in rt2400pci_config_erp()
359 		rt2x00mmio_register_read(rt2x00dev, ARCSR5, &reg);  in rt2400pci_config_erp()
371 		rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2400pci_config_erp()
375 		rt2x00mmio_register_read(rt2x00dev, CSR18, &reg);  in rt2400pci_config_erp()
380 		rt2x00mmio_register_read(rt2x00dev, CSR19, &reg);  in rt2400pci_config_erp()
387 		rt2x00mmio_register_read(rt2x00dev, CSR12, &reg);  in rt2400pci_config_erp()
496 	rt2x00mmio_register_read(rt2x00dev, CNT0, &rf->rf1);  in rt2400pci_config_channel()
509 	rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2400pci_config_retry_limit()
526 		rt2x00mmio_register_read(rt2x00dev, CSR20, &reg);  in rt2400pci_config_ps()
539 		rt2x00mmio_register_read(rt2x00dev, CSR20, &reg);  in rt2400pci_config_ps()
567 	rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2400pci_config_cw()
585 	rt2x00mmio_register_read(rt2x00dev, CNT0, &reg);  in rt2400pci_link_stats()
640 		rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2400pci_start_queue()
645 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_start_queue()
663 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_kick_queue()
668 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_kick_queue()
673 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_kick_queue()
691 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2400pci_stop_queue()
696 		rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2400pci_stop_queue()
701 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_stop_queue()
771 	rt2x00mmio_register_read(rt2x00dev, TXCSR2, &reg);  in rt2400pci_init_queues()
779 	rt2x00mmio_register_read(rt2x00dev, TXCSR3, &reg);  in rt2400pci_init_queues()
785 	rt2x00mmio_register_read(rt2x00dev, TXCSR5, &reg);  in rt2400pci_init_queues()
791 	rt2x00mmio_register_read(rt2x00dev, TXCSR4, &reg);  in rt2400pci_init_queues()
797 	rt2x00mmio_register_read(rt2x00dev, TXCSR6, &reg);  in rt2400pci_init_queues()
802 	rt2x00mmio_register_read(rt2x00dev, RXCSR1, &reg);  in rt2400pci_init_queues()
808 	rt2x00mmio_register_read(rt2x00dev, RXCSR2, &reg);  in rt2400pci_init_queues()
825 	rt2x00mmio_register_read(rt2x00dev, TIMECSR, &reg);  in rt2400pci_init_registers()
831 	rt2x00mmio_register_read(rt2x00dev, CSR9, &reg);  in rt2400pci_init_registers()
836 	rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_init_registers()
849 	rt2x00mmio_register_read(rt2x00dev, ARCSR0, &reg);  in rt2400pci_init_registers()
856 	rt2x00mmio_register_read(rt2x00dev, RXCSR3, &reg);  in rt2400pci_init_registers()
873 	rt2x00mmio_register_read(rt2x00dev, MACCSR2, &reg);  in rt2400pci_init_registers()
877 	rt2x00mmio_register_read(rt2x00dev, RALINKCSR, &reg);  in rt2400pci_init_registers()
884 	rt2x00mmio_register_read(rt2x00dev, CSR1, &reg);  in rt2400pci_init_registers()
890 	rt2x00mmio_register_read(rt2x00dev, CSR1, &reg);  in rt2400pci_init_registers()
900 	rt2x00mmio_register_read(rt2x00dev, CNT0, &reg);  in rt2400pci_init_registers()
901 	rt2x00mmio_register_read(rt2x00dev, CNT4, &reg);  in rt2400pci_init_registers()
975 		rt2x00mmio_register_read(rt2x00dev, CSR7, &reg);  in rt2400pci_toggle_irq()
985 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_toggle_irq()
1038 	rt2x00mmio_register_read(rt2x00dev, PWRCSR1, &reg);  in rt2400pci_set_state()
1051 		rt2x00mmio_register_read(rt2x00dev, PWRCSR1, &reg2);  in rt2400pci_set_state()
1181 	rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2400pci_write_beacon()
1321 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_enable_interrupt()
1346 		rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_txstatus_tasklet()
1382 	rt2x00mmio_register_read(rt2x00dev, CSR7, &reg);  in rt2400pci_interrupt()
1420 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2400pci_interrupt()
1441 	rt2x00mmio_register_read(rt2x00dev, CSR21, &reg);  in rt2400pci_validate_eeprom()
1489 	rt2x00mmio_register_read(rt2x00dev, CSR0, &reg);  in rt2400pci_init_eeprom()
1634 	rt2x00mmio_register_read(rt2x00dev, GPIOCSR, &reg);  in rt2400pci_probe_hw()
1696 	rt2x00mmio_register_read(rt2x00dev, CSR17, &reg);  in rt2400pci_get_tsf()
1698 	rt2x00mmio_register_read(rt2x00dev, CSR16, &reg);  in rt2400pci_get_tsf()
1709 	rt2x00mmio_register_read(rt2x00dev, CSR15, &reg);  in rt2400pci_tx_last_beacon()