Lines Matching refs:rt2x00mmio_register_read

141 	rt2x00mmio_register_read(rt2x00dev, CSR21, &reg);  in rt2500pci_eepromregister_read()
170 		.read		= rt2x00mmio_register_read,
205 	rt2x00mmio_register_read(rt2x00dev, GPIOCSR, &reg);  in rt2500pci_rfkill_poll()
218 	rt2x00mmio_register_read(led->rt2x00dev, LEDCSR, &reg);  in rt2500pci_brightness_set()
236 	rt2x00mmio_register_read(led->rt2x00dev, LEDCSR, &reg);  in rt2500pci_blink_set()
270 	rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2500pci_config_filter()
301 		rt2x00mmio_register_read(rt2x00dev, BCNCSR1, &reg);  in rt2500pci_config_intf()
309 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2500pci_config_intf()
336 		rt2x00mmio_register_read(rt2x00dev, TXCSR1, &reg);  in rt2500pci_config_erp()
343 		rt2x00mmio_register_read(rt2x00dev, ARCSR2, &reg);  in rt2500pci_config_erp()
350 		rt2x00mmio_register_read(rt2x00dev, ARCSR3, &reg);  in rt2500pci_config_erp()
357 		rt2x00mmio_register_read(rt2x00dev, ARCSR4, &reg);  in rt2500pci_config_erp()
364 		rt2x00mmio_register_read(rt2x00dev, ARCSR5, &reg);  in rt2500pci_config_erp()
376 		rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2500pci_config_erp()
380 		rt2x00mmio_register_read(rt2x00dev, CSR18, &reg);  in rt2500pci_config_erp()
385 		rt2x00mmio_register_read(rt2x00dev, CSR19, &reg);  in rt2500pci_config_erp()
392 		rt2x00mmio_register_read(rt2x00dev, CSR12, &reg);  in rt2500pci_config_erp()
416 	rt2x00mmio_register_read(rt2x00dev, BBPCSR1, &reg);  in rt2500pci_config_ant()
539 	rt2x00mmio_register_read(rt2x00dev, CNT0, &rf->rf1);  in rt2500pci_config_channel()
557 	rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2500pci_config_retry_limit()
574 		rt2x00mmio_register_read(rt2x00dev, CSR20, &reg);  in rt2500pci_config_ps()
587 		rt2x00mmio_register_read(rt2x00dev, CSR20, &reg);  in rt2500pci_config_ps()
623 	rt2x00mmio_register_read(rt2x00dev, CNT0, &reg);  in rt2500pci_link_stats()
629 	rt2x00mmio_register_read(rt2x00dev, CNT3, &reg);  in rt2500pci_link_stats()
729 		rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2500pci_start_queue()
734 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2500pci_start_queue()
752 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2500pci_kick_queue()
757 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2500pci_kick_queue()
762 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2500pci_kick_queue()
780 		rt2x00mmio_register_read(rt2x00dev, TXCSR0, &reg);  in rt2500pci_stop_queue()
785 		rt2x00mmio_register_read(rt2x00dev, RXCSR0, &reg);  in rt2500pci_stop_queue()
790 		rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2500pci_stop_queue()
856 	rt2x00mmio_register_read(rt2x00dev, TXCSR2, &reg);  in rt2500pci_init_queues()
864 	rt2x00mmio_register_read(rt2x00dev, TXCSR3, &reg);  in rt2500pci_init_queues()
870 	rt2x00mmio_register_read(rt2x00dev, TXCSR5, &reg);  in rt2500pci_init_queues()
876 	rt2x00mmio_register_read(rt2x00dev, TXCSR4, &reg);  in rt2500pci_init_queues()
882 	rt2x00mmio_register_read(rt2x00dev, TXCSR6, &reg);  in rt2500pci_init_queues()
887 	rt2x00mmio_register_read(rt2x00dev, RXCSR1, &reg);  in rt2500pci_init_queues()
893 	rt2x00mmio_register_read(rt2x00dev, RXCSR2, &reg);  in rt2500pci_init_queues()
910 	rt2x00mmio_register_read(rt2x00dev, TIMECSR, &reg);  in rt2500pci_init_registers()
916 	rt2x00mmio_register_read(rt2x00dev, CSR9, &reg);  in rt2500pci_init_registers()
924 	rt2x00mmio_register_read(rt2x00dev, CSR11, &reg);  in rt2500pci_init_registers()
928 	rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2500pci_init_registers()
941 	rt2x00mmio_register_read(rt2x00dev, TXCSR8, &reg);  in rt2500pci_init_registers()
952 	rt2x00mmio_register_read(rt2x00dev, ARTCSR0, &reg);  in rt2500pci_init_registers()
959 	rt2x00mmio_register_read(rt2x00dev, ARTCSR1, &reg);  in rt2500pci_init_registers()
966 	rt2x00mmio_register_read(rt2x00dev, ARTCSR2, &reg);  in rt2500pci_init_registers()
973 	rt2x00mmio_register_read(rt2x00dev, RXCSR3, &reg);  in rt2500pci_init_registers()
984 	rt2x00mmio_register_read(rt2x00dev, PCICSR, &reg);  in rt2500pci_init_registers()
1005 	rt2x00mmio_register_read(rt2x00dev, MACCSR2, &reg);  in rt2500pci_init_registers()
1009 	rt2x00mmio_register_read(rt2x00dev, RALINKCSR, &reg);  in rt2500pci_init_registers()
1022 	rt2x00mmio_register_read(rt2x00dev, CSR1, &reg);  in rt2500pci_init_registers()
1028 	rt2x00mmio_register_read(rt2x00dev, CSR1, &reg);  in rt2500pci_init_registers()
1038 	rt2x00mmio_register_read(rt2x00dev, CNT0, &reg);  in rt2500pci_init_registers()
1039 	rt2x00mmio_register_read(rt2x00dev, CNT4, &reg);  in rt2500pci_init_registers()
1129 		rt2x00mmio_register_read(rt2x00dev, CSR7, &reg);  in rt2500pci_toggle_irq()
1139 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2500pci_toggle_irq()
1191 	rt2x00mmio_register_read(rt2x00dev, PWRCSR1, &reg);  in rt2500pci_set_state()
1204 		rt2x00mmio_register_read(rt2x00dev, PWRCSR1, &reg2);  in rt2500pci_set_state()
1333 	rt2x00mmio_register_read(rt2x00dev, CSR14, &reg);  in rt2500pci_write_beacon()
1449 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2500pci_enable_interrupt()
1474 		rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2500pci_txstatus_tasklet()
1510 	rt2x00mmio_register_read(rt2x00dev, CSR7, &reg);  in rt2500pci_interrupt()
1548 	rt2x00mmio_register_read(rt2x00dev, CSR8, &reg);  in rt2500pci_interrupt()
1567 	rt2x00mmio_register_read(rt2x00dev, CSR21, &reg);  in rt2500pci_validate_eeprom()
1643 	rt2x00mmio_register_read(rt2x00dev, CSR0, &reg);  in rt2500pci_init_eeprom()
1959 	rt2x00mmio_register_read(rt2x00dev, GPIOCSR, &reg);  in rt2500pci_probe_hw()
1995 	rt2x00mmio_register_read(rt2x00dev, CSR17, &reg);  in rt2500pci_get_tsf()
1997 	rt2x00mmio_register_read(rt2x00dev, CSR16, &reg);  in rt2500pci_get_tsf()
2008 	rt2x00mmio_register_read(rt2x00dev, CSR15, &reg);  in rt2500pci_tx_last_beacon()